Because over-voltage blocking capability is important for this module, we have decided to switch from three 2.1 mOhm, 75 V MOSFETs in parallel (TPH2R608NHL1Q) to just one (IPT015N10NF2SATMA1) rated for 100 V and 1.5 mOhm.
By looking at the previous thermal tests, we believe that the roughly double series resistance (1.5m instead of 0.7m) will still result in the FETs being less than the target temperature of 100 C at 30 A given the following:
The power dissipated by the FETs is approximately
Where R is the FET on-state resistance, and I is the current through the FET.
For the 3 FET case, each dissipates:
Where I is now the total current through the module. But there are 3 FETs, so the total power dissipated is:
In the single case FET:
So the ratio between initial and final power is
The power is related to the temperature rise through the overall heat transfer equation:
Where UA is the overall heat transfer coefficient. In reality, UA will be higher for the new FETs because there is more area and increased temperature results in more convective heat transfer, but lets assume its the same to remain conservative.
This means that the temperature rise will raise proportionally, so given that the previous temperature rise was ~30 C at a 25C ambient, the new temperature should be less than 89.2 C at a 25 C ambient at 29.5 A.
Follow to see how accurate this first order approximation turns out during testing!
PN Labs
Discussions
Become a Hackaday.io Member
Create an account to leave a comment. Already have an account? Log In.