Main goal was to set up a toolchain for SoC development on a Gowin FPGA. We basically need:

- A processor. Litex provides many of them, RiscV has the advantage of being supportd by LVGL, a powerful graphics library. VexRiscV seemed to be the most supported design right now

- An LCD user interface. Tang Primer board has an 8-pin FPC connector, it fits a 135*240 ST7789 display that can be purchased through the usual sources, looking for "1.14 LCD".

-  Audio DAC interface of Tang board. (PT8211)

- EtherBone connection for debugging and control of the SoC from the outside world through Ethernet

- A Zero-IF SDR, with Hilbert filter for SSB reception. RF ADC is a one bit Delta Sigma, for a minimal configuration, but a better dynamic can be obtained with a proper multibit ADC.

- An SD Card interface for the VexRiscV binary executable.

-Some GPIO to be interfaced to the board's LEDs and buttons, for a basic user interface.

Then a lowpass filter and a RF amplifier are needed. LPF for now is a three pole design with cutoff at 8 MHz. Amplifier uses 2 bipolar transistors and some resistors. It could be substituted by an MMIC, Some complete LNAs are available for less than 2 USD . Dynamic range is not top class, given the simple ADC, so its gain is important. 10 dB is about right for a 40 m half wave dipole. 

There is a bitstream for the FPGA that could be flashed to the board  for some easy test, toolchain setup could be somewhat frustrating. Put the RiscV executable on an SD card, and name it boot.bin.  

Some useful links:

- RF filters design: https://markimicrowave.com/technical-resources/tools/lc-filter-design-tool/

- Some notes about this FPGA board: https://github.com/alberto-grl/Sipeed-Tang-Gowin-FPGA

- An Octave tool for Hilbert filter response validation. It also generates Verilog code for a filter with chosen parameters: https://github.com/alberto-grl/Hilbert_gen

- A video with recording of some receptions and a description of the design: