This project is an open, reverse-engineered implementation of the Motorola MC68881 floating-point unit, written in VHDL and intended for use in FPGA-based 68k systems.

Despite the availability of several open Motorola 68000-family CPU cores, there does not currently appear to be an open hardware implementation of the original 68881/68882 FPU. In practice, this leaves FPGA 68k systems reliant on software emulation, stubs, or behavioural shortcuts that fail to reproduce real-world FPU behaviour. This project exists to address that gap.
Long term plans include amending an existing 68030 core to include a co-processor interface and support for this FPU.
If the approach succeeds an MMU will follow.