The OS9 Clock module is an interesting one. In the OS9 hierachy diagram it sits together with Init at the same level as the OS9 kernel (OS9p1 & OS9p2).
The Clock module takes care of initialising the clock which is a 100Hz oscillator driven signal which, in our case, is connected to the onboard MC6821 (PIA). The PIA also provides a TimerEnable signal which is used to stop the 100Hz clock if it is logical '1'.
Also the Clock module provides seconds,minutes, hours, etc. registration based on the 'ticks' coming in from the 100Hz clock. This is done through generating interrupts by the PIA.
There is no direct start of the clock by the operating system. In fact the F$Time system call is only available when the Clock module is called using the Setime command which also starts the Clock.
Below a snippet showing how the PIA is setup and the clock is started by setting the TimerEnable signal low '0'. By default the TimerEnable is '1' due to a pullup resistor.
***** * * CLOCK INITIALIZATION ENTRY * ClkEnt pshs cc lda #TickSec get ticks per second sta D.Tick lda #TickSec/10 set ticks/time slice sta D.TSlice sta D.Slice leax CLKSRV,pcr GET SERVICE ROUTINE stx D.IRQ SET INTERRUPT VECTOR * PIA initialisation goes here ldx CLKPRT,pcr get PIA address orcc #IntMasks set interrupt masks clra sta 1,x clr control register lda #%00000001 PIA port A bit0 output, rest input sta ,x set data direction register lda #5 select pheripheral register & CRA1 interrupt enable, high to low sta 1,x set control register clra sta ,x clear bit 0 which enables 100Hz clock lda ,x clear any current interrupts puls cc restore interrupt masks leay TIMSVC,PCR OS9 F$SSvc SET TIME SERVICE ROUTINE ClkEnt3 rts
Full Clock source code is attached.
Note: it is assumed that PIA A-side pins other than 'pin 0' are inputs. That is true (see schematic) for 'pin 4' or PA4 which is connected to the clock but not necessarily for the other pins. Currently these pins have no meaningfull purpose but one could consider using these and then the above PIA A-side initialisation needs to change.
roelof4
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