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NextTang: ZX Spectrum machines on a Sipeed Tang FPGA console

Open-source port of Spectrum FPGA hardware to the Tang Console 138K. 48K, 128K and 256-colour Spec256 run today; the Next core is the goal.

jon-attreeJon Attree
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NextTang is a GPLv3 project putting the ZX Spectrum Next FPGA core on Sipeed's Gowin-based Tang Console boards, starting with the Console 138K. The board arrived in mid-August 2026. Since then it has learned to drive HDMI, calibrate its onboard DDR3, boot real 48K and 128K Spectrum ROMs, load games from an SD card, take a USB keyboard and joystick directly in FPGA fabric, and run the Spec256 format: original 1980s game code with graphics recoloured to 256 colours, no colour clash. A SAM Coupé core is next. The Next core itself is still in progress and this page will say so until it is not.

Every claim here is labelled. Build-verified means the vendor tools produced a timing-clean bitstream. Hardware-verified means the board did the thing and a capture or measurement was retained. Nothing is promoted without evidence.

Why this board

The Tang Console 138K has a Gowin GW5AST-138 with 138k LUTs and 1 GB of DDR3 on the module, HDMI, two USB-A ports, SD, and a PCIe FPC for a Raspberry Pi 5. That is far more fabric than a Spectrum needs, which is the point: the spare room goes on instrumentation and a hardware debugger, so problems found here can be fixed and fed back to smaller boards like the Tang Nano 20K where NextNano lives.

What runs on the board today

  • 720p HDMI output from the 50 MHz board clock, with a frame-safe 50-to-60 Hz scan converter for the Spectrum's PAL timing
  • DDR3 calibrated and verified across the full 1 GiB address map
  • 48K Spectrum with its upper 32 KiB in DDR3; 128K Spectrum with six of eight banks in DDR3
  • Read-only FAT32 SD loading of TAP and TZX tapes through the ROM loader, with a menu
  • USB keyboard and controller hosted directly in fabric on both USB-A ports, no microcontroller in the loop
  • Spec256: one ordinary Z80 plus eight graphical Z80 lanes in lockstep. 22 game packs from the published collection build, 19 play cleanly in bounded tests
  • HDMI audio, including the AY chip and beeper mix

What does not run yet

  • The ZX Spectrum Next core. It is the reason the project exists and it is not there yet.
  • The hardware debugger. The protocol is chosen (DZRP, so DeZog and VS Code work unchanged) and nothing is implemented.
  • Pi 5 over PCIe. Sipeed and Gowin have an unresolved link fault against the Pi 5, so USB comes first.

How it is built

Gowin's own EDA for synthesis and place-and-route, because the open flow cannot yet configure a PLL on this device. Everything else is open source: Icarus Verilog and GHDL for simulation, Verilator as a lint gate over every board profile, about 500 Python-driven tests, and differential testing against software emulators for the machines. The repository keeps a per-file provenance table for every imported upstream file and ships no ROMs or game data; those come from the user's own card.

Where to follow

  • 1 × Sipeed Tang Console 138K GW5AST-LV138PG484AC1/I0 on a 30354 SOM with 1 GB Hynix DDR3, carrier 32001C
  • 1 × 5 V / 2 A power supply Into the FPGA port; the debugger USB alone is not enough for the DDR3 rail
  • 1 × FT232RL USB-UART adapter On PMOD0 for the status UART: PLL lock, opcode fetches, memory writes, frame counts
  • 1 × Elgato HDMI capture card For retained evidence captures; the previous cheap card rejected valid signals as blank
  • 1 × USB keyboard and USB gamepad Hosted directly by the FPGA on the two USB-A ports

View all 7 components

  • 2026-09-07: SAM Coupé starts

    Jon Attree • an hour ago • 0 comments

    The MiSTer SAM Coupé core (GPL-2.0-or-later throughout, audited per file) has been imported behind the same platform layer. Three builds in one day: the machine with its ROM and the scaler, then the USB keyboard mapped to the SAM's 9-row matrix, then disk images mounted from the SD card through a WD1793 bridge.

    All build-verified with zero timing violations, at 85% of block RAM and almost no setup margin. Nothing has been programmed yet; the first bench load is next. The Raspberry Pi 5 for the debug host also arrived this week.

  • 2026-09-01: SD card, USB in fabric, 128K, and a 22-game sweep

    Jon Attree • an hour ago • 0 comments

    The 48K and 128K machines now load tapes from a FAT32 card through a menu, with the 128K machine playing Spellbound for three minutes with six banks in DDR3. A USB keyboard and controller are hosted directly by the FPGA on both USB-A ports; the earlier failure was a keyboard emitting a vendor report prefix, not a port problem.

    All 22 Spec256 packs the 48K format can express were run on the board: 14 passed on the day, five more were fixed by one correction to how the graphical lanes follow the master's addresses, and two remain open.

    Episode 5: Giving the ZX Spectrum 256 Colours on Real FPGA Hardware

  • 2026-08-20: Spec256, 256 colours on the actual game code

    Jon Attree • an hour ago • 0 comments

    Spec256 is a 2000s format where artists recoloured Spectrum games into eight extra bit-planes, and a second "graphical" Z80 propagates those colours through the game's own drawing routines. On the FPGA that is one master Z80 plus eight graphical lanes in lockstep.

    The first moving Jetpac exposed a real bug, the lanes picking up DD/FD prefixes one fetch late, caught by comparing 72,000 instructions against the GZX emulator. After the fix: clean enhanced Jetpac and Chuckie Egg, with game packs loaded at runtime over a UART without reprogramming the FPGA.

  • 2026-08-18: A 1982 ROM boots

    Jon Attree • an hour ago • 0 comments

    The imported T80 CPU and the upstream ULA raster ran a user-supplied 48K ROM at 3.5 MHz, printed BASIC, and ran a typed program. The Spectrum's 50 Hz frame is captured whole into a triple buffer and scan-converted to 720p60 without tearing.

    A status UART on a PMOD pin now reports PLL lock, opcode fetches and memory writes, so a blank screen is no longer the only diagnostic. The same day the upper 32 KiB of the 48K machine moved into DDR3 and the ROM still printed the same loop, five loads out of five.

    Episode 4: We Gave the Tang Console a 1982 ZX Spectrum ROM. It Booted.

  • 2026-08-17: DDR3 wasn't broken. I was.

    Jon Attree • an hour ago • 0 comments

    The DDR3 controller timed out in calibration on every attempt for two days: more power, the other SOM geometry, each x16 device on its own, external VREF, nothing moved it. Then Sipeed's own reference image passed on the same board, and the difference was the clock.

    The board clock is 50 MHz, not the 27 MHz I had assumed, and Gowin derives the PLL's charge-pump and loop-filter settings from the declared input frequency string, so my hand-written PLL had never been right. Along the way the HDMI capture card was rejecting valid signals as blank frames, which cost a night chasing a lock failure that did not exist.

    With the generated PLL restored, calibration passed, then every address line in the 1 GiB map, then a logo streamed continuously from DDR3.

    Episode 3: The Tang Console's Memory Wasn't Broken. We Were.

  • 2026-08-16: Board arrives, factory menu boots, and the first NextTang image

    Jon Attree • an hour ago • 0 comments

    The Console 138K arrived with a 32001C carrier and a 30354 1 GB SOM. The factory TangCore menu came up from the supplied card, the included controller navigated it, and NESTang and SnesTang switched cores.

    Loading my own bitstream over JTAG took a detour: passing the packaged .bin files straight to openFPGALoader left HDMI black, and only the original .fs record boundaries load. The first NextTang image, colour bars and a moving logo at 720p, worked once the PLL matched the values a known-good Console design uses.

    A lesson that would repeat: a timing-clean build that programs cleanly and shows nothing is the normal failure mode on this board.

    Episode 2: We Got Our First Video Output from the Tang Console

View all 6 project logs

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