I wanted to continue my benchmarks and run my simple Basic program also under TI Extended Basic. That turned out to be impossible, as the keyboard repeat rate problem was much worse under extended basic than built-in Basic.

It was time to do something about this. Instead of trying to hack the code (I tried quickly but too much code to disassemble and understand) it was time for a hardware solution. Execution speed on the TMS9900 is largely dependent on memory access speed. I added a 6-bit delay counter, which enabled me to add up to 63 wait states per memory access. The Pepino FPGA board has a 8 DIP switches, so I used three of those switches for determination of wait states (I did this with a clocked latch, so it is possible to adjust speed in flight):

• DIP switch 1 on: 63 wait states
• DIP switch 2 on: 31 wait states
• DIP switch 3 on: 8 wait states
• All off: no wait states

Switch 1 has priority, so if it is on there will be 63 wait states. I also took a quick look at the CPU's memory timing under simulation: with no wait states reads take 40ns and writes 60ns, with 63 wait states reads take 670ns.

Alas, it turned out that a 6-bit delay counter was too short, as I got these results when comparing execution speed under TI extended Basic for my test program:

• Classic99 emulation: 1 min 11 s
• 63 wait states: 24.7s, 2.9x faster
• 31 wait states: 13.6s, 5.2x faster
• 8 wait states: 5.6s, 12.7x faster
• 0 wait states: 2.9s, 24.5x faster

So even with the maximum of 63 wait states this thing goes too fast... Need to slow it down further. But not tonight. 

Here is a video: