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BeagleWire

The BeagleWire is an FPGA(Lattice iCE40HX4k) development platform that has been designed for use with BeagleBone boards.

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The Lattice iCE40 is a family of FPGAs with a minimalistic architecture and very regular structure, designed for low-cost, high-volume consumer and system applications. BeagleWire does not require external tools (JTAG) and the whole software is Open Source. FPGA cape allows easy and low cost start for beginners who would like to take their first steps in working with FPGAs. The BeagleWire creates a powerful and versatile digital cape for users to create their imaginative digital designs.

Hardware Specification:

  • FPGA: Lattice iCE40HX4K
  • 32 MB SDRAM
  • GPIO
  • 4 LEDs
  • 4 PMOD connectors
  • 4 Grove connectors
  • 2 user push buttons
  • 2 input DIP switch
  • 100Mhz external clock
  • 4 layer PCB optimized design to support maximum performance for high bandwidth applications

The project is completely open and community contributions are encouraged.

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Discussions

Jeff wrote 08/09/2018 at 00:46 point

I'm trying to log in to my beaglebone using the image provided here https://elinux.org/BeagleBoard/BeagleWire, but the default password debian/temppwd is not working.  Can you provide the user/login for this image?

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Michael Welling wrote 08/13/2018 at 21:04 point

Lets continue to figure this out via email. Just sent you another reply and hopefully we can figure this out. The defaults should be the same if all is well.

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Michael Welling wrote 03/02/2018 at 20:42 point

There is a Crowd Supply campaign going for BeagleWire:

https://www.crowdsupply.com/qwerty-embedded-design/beaglewire

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BeagleBoard Foundation wrote 08/29/2017 at 19:17 point

Nice video @Patryk Mężydło !

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Jakub Trzebiatowski wrote 04/10/2017 at 07:32 point

I will be following this for sure!

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BeagleBoard Foundation wrote 04/06/2017 at 17:48 point

Awesome to see a FPGA cape that will have Free Software support for Synthesis!

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oshpark wrote 04/06/2017 at 17:22 point

Exciting, this Lattice FPGA is supported by Yosys, right?t http://www.clifford.at/yosys/

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Patryk Mężydło wrote 04/06/2017 at 17:25 point

yes, I will be porting it during gsoc17

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