I started development of the Python module for interfacing with the programmer hardware.  Currently the module reads a standard SVF file from the Lattice tools and attempts to play back all the commands over JTAG.  It appears as if it should be working according to my logic analyzer, but there are some bugs to track down.  Maybe a few more days.

Started using the MPLAB debugger tools, pretty slick stuff.  But it sure looks silly having the PIC programmer stacked on top of the FPGA programmer stacked on top of the FPGA board:

Stay tuned!