RISC-V on EE Times
RISC-V: An Open Standard for SoCs, the case for an open ISA has been published on the EE Times Blog. It is also available as EECS Tech Report 2014-146.
A project log for RISC-V Instruction Set Architecture
RISC-V is a free, open general-purpose instruction set architecture developed at UC Berkeley, designed to be flexible and extensible.
RISC-V on EE Times
RISC-V: An Open Standard for SoCs, the case for an open ISA has been published on the EE Times Blog. It is also available as EECS Tech Report 2014-146.
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