Here is a picture of Tiny302 posted earlier with the addition of a seven-segment/LED/switch display. The display is compatible with the simulated hardware display in Sim68K so the software that runs in simulation will run on this hardware. It is a memory-map implementation so there are actual 8-bit latches resides in memory locations as documented in the EASy68K Help. The LED and 7-seg displays are power hogs, drawing about 15-20mA per segment so it consumes over an amp @5V when it is fully lit. The challenges are using drivers that can source the required current, yet not too powerful to require current limiting resistors everywhere. I used a stack of 3 silicon diodes to raise the output voltage of HC drivers (74HC273 & 74HC240) to over 3V which begins to limit its output currents--it is not a textbook design, but does work.
This design is probably meant for pc board. It is pretty tedious to hand wire all these connections. I thought about using Altera's 7128S CPLD, but there are more connections than can be fitted in a 84PLCC and current drive capability is an issue, so discrete TTLs on pc board is probably the right implementation.
Half way into wiring the board, I thought of another way of doing this that's quite a bit simpler in logic and interconnects. It requires the CPU to drive each 7-segment display in rapid succession and relies on persistence of vision to blend them into one solid image of eight 7-segment display. It does not need connection into actual address & data buses so I can use the 82C55 peripheral chip on the repurposed 68302 SBC to drive the simplified hardware display. That should be an interesting project next.
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