Spring has finally spring here in Southeastern Michigan, so I'm finding more non-electronic things to do lately. Still, I managed to continue experimenting with the DE1 Cyclone II eval board that I've bridged to the hd6309 SBC. I found several nice VHDL implementations of PS/2 keyboard interfaces. I settled on a GPL'd set of code I found at eewiki.net

http://eewiki.net/pages/viewpage.action?pageId=28279002

That not only does the (easy) job of receiving the PS/2 clock and data pulses, but also the (less easy) job of converting the PS/2 keyboard "scan codes" into simple ASCII values. So, in short order, I could use the hd6309 ROM monitor program to read keys from a PS/2 keyboard connected to the DE1. I implemented the read-only keyboard data port "Apple ][ style" where the MSB is high when new key data is available, and low if it's already been read. The ASCII value of the key pressed is contained the lower 7 bits. So, for example, if I hit the "A" key, the first time I read the port it will read $C1 ($80+$41) and on subsequent reads it will read $41. Simple. 

Recall that the goal for the FPGA is to implement PS/2 keyboard, a sound chip (see previous log), a paged memory unit, and a VGA-compatible video interface. I'm convinced that the Cyclone II FPGA is capable of all of these things - much more, really.  For example, I did notice that opencores has VHDL for several IEEE-754 compliant Floating Point arithmetic units...hmmmm...