​FPGA decoupling can be tricky to sort out without some guidance.  Thankfully, Xilinx provides a pretty comprehensive PCB Layout guide that has specific recommendations for decoupling schemas for the PCB, based on specific parts and pin counts.  I have followed these and attached a reference to the document in the list of related links alongside my project.  I will add this to a video (to follow) that describes exactly how this all fits together.

For details on the recommended decoupling caps for this family, refer to page 14 of the ​PCB Pin Planning Guide for the Spartan-6 family.  I am using the TQ-144, LX9 (as of this writing, pg. 14, second row).  Please post questions, concerns, etc in the comments and I'll do my best to answer them.

Files uploaded to git.  FPGA schematic updated also to reflect decoupling child sheet.