Looking back at the 6809's manual, I am now appalled by the elaborate addressing modes. No wonder CISC almost died !

In my designs, there is another rule : provide the operands as fast as possible to the execution units. Keep the path as short as possible, and uninterrupted, from the instruction decoder and the ALU. This means that only two types of data are encoded in the instructions :

• Literal data, sometimes shifted and/or sign-extended. The latency is a few gates and some fanout.
• Register values : just read the register set (some gates of latency, a bit more than literal data but not so much).

Two other sources of data are flags/condition codes, and In/Out port values but they are treated separately.

Anyway, when done right, your units get data to process one cycle after you got your instruction word.

Don't waste time with memory, it's a mess. Careful coding with a register-mapped memory system should shadow some of the latency. Indexed addressing modes, or indirect, or these crazy systems slow everything down. Traps become a trainwreck. Main memory is the enemy. KISS !

Of course, reading a data memory register might stall. There is no absolute and perfect  way around slow memory. But keep as much data as possible in your registers so they can be addressed almost immediately. The decoder can speculatively decode the register numbers and read corresponding words of data before you have checked a pointer's validity.