Okay, debugging is under control now and I've re-verified gates A-M. The completed schematic is now up here. Gates N-Z should be done soon as well and I can move on to 2-input gates like AND, OR, NAND, NOR, etc.
A project log for Tern - Ternary Logic Circuits
A series of ternary logic gates and higher level components implemented in the real world.
Okay, debugging is under control now and I've re-verified gates A-M. The completed schematic is now up here. Gates N-Z should be done soon as well and I can move on to 2-input gates like AND, OR, NAND, NOR, etc.
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