The interesting thing about the first four two-input gates I devised (Min, Max, Antimin, and Antimax), was that they were just combinations of monadic gates 5 and P. Specifically, two 5's (Antimin), two P's (Max), two 5's passed through a 5(Min), and two P's passed through a 5(Antimax). This is important later.

Because I already had this set up on the breadboard I tried mixing the first set of 5's and P's to see what truth tables I would get out of them. I found four more interesting gates and eventually learned that the 5-P gate is called Implication, P-5 is called Converse Implication, 5-P followed by an inverter (another 5) is called Nonimplication, and a P-5 followed by a 5 is called a Converse Nonimplication. Here are the truth tables.

Implication

Converse Implication

Nonimplication

Converse Nonimplication

And the schematic is here.

As a byproduct of trying to figure out what these gates should be called, I learned some pretty fundamental things about what I am trying to do with ternary logic that I was unaware of. I took a deep dive into symbolic logic to figure it out, but that's another post for another time.