Yann Guidon / YGDESI got the core part of the system working a few minutes ago :-D
More internal details will follow in the coming months.
First successful decoding of 3R stream in VHDL
A project log for Recursive Range Reduction (3R) HW&SW CODEC
A high speed circuit design in JS and VHDL for decoding 3R bitstreams, a "quasi-entropy" code that compacts series of correlated numbers.
Discussions
Become a Hackaday.io Member
Create an account to leave a comment. Already have an account? Log In.