Planning done

A project log for ZynqBerry

Xilinx ZYNQ based RPi

Antti Lukats • 09/26/2015 at 19:22•1 Comment

With lowest cost ZYNQ device package some compromises are required:

1 Bidirectional DSI not possible - this is very maybe not needed anyway

2 Analog video output replaced by audio input in 3.5mm Jack

This setup yields in I/O Pin utilization of 100% nothing is left over but nothing is missing either

Next log

10/26/2015 at 08:33 • 1 comment

Discussions

AVR wrote 09/27/2015 at 05:58

so pumped for this board!!

Are you sure? yes | no