Porting the GPU over to the DE2-115 so I can have a 32 bit SDRAM bus. New display, 24BPP, but it's not self-scan. Will need to add a scanline fifo that is filled often enough for the display to be scanned out while the GPU masters the bus.
A project log for FPGA-based GPU as high speed learning platform
FPGA-based GPU and sprite engine with burst optimized design, implemented across several FPGA platforms and memory systems.
Porting the GPU over to the DE2-115 so I can have a 32 bit SDRAM bus. New display, 24BPP, but it's not self-scan. Will need to add a scanline fifo that is filled often enough for the display to be scanned out while the GPU masters the bus.
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