Ian HanschenMessed around with bus priority on the SRAM and SDRAM, tweaked the JTAG command batch and sleep time.
Need to stick some FIFOs on the memory ports.
Faster, but still pretty slow
A project log for FPGA-based GPU as high speed learning platform
FPGA-based GPU and sprite engine with burst optimized design, implemented across several FPGA platforms and memory systems.
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