One of the units of the YASEP is called SHL, for "SHuffLe" unit. It performs bit shift and rotations:

• SHR is SHift logic Right
• SHRO is SHR then OR with the destination
• SAR is Shift Arithmetic Right (preserves the MSB)
• SHL is SHift Left
• SHLO is SHL then OR with destination
• ROR is ROtate Right
• ROL is ROtate Left
• BSWAP amounts to a rotation by 8 bits for YASEP16, byte swap for YASEP32.

All these operations are grouped because they use a barrel shifter (plus a OR layer of SHR0 and SHLO). The purpose of this unit is simply to move bits around (to shuffle them).

The structure of the barrel shifter is centered around several layers of multiplexers:

1. Bit 0 of the shift amount operand will shift the data operand by 0 or 1 bit
2. Bit 1 shifts by 0 or 2 bits
3. Bit 2 shifts by 0 or 4 bits
4. Bit 3 shifts by 0 or 8 bits

The last layer is used for BSWAP, with all precedent layers not shifting.

Mixing shift and rotation makes it a marginally more complex, but mixing left and right shifts, with arithmetic/logic options becomes pretty complex with MUX2s (74HC157).

However with the 74HC153, things become pretty simple again: it's a dual MUX4 so each bit can select between "pass", "left", "right", "another right" (for sign extension) and even 0 because each output can be cleared. With 4 layers of 16 bits, this amounts to 32×74HC153 (only). If we add the last OR layer, this is 36 chips, without the control/decoding gates (and buffers).

The '153 is also a bit easier to route, as well, as seen when studying the register set.

The preliminary diagram looks like this:

(I know it's not working well but it's a start)