Well it looks like I didn't fix the interrupt handling as well as I thought I had. The test code worked fine when a simple count was short, unfortunately I when I extended this count I appear to have encountered an interrupt. This meant that everything went wild as wrong return vector was being used.

This, as far as I can tell, has now been corrected.

I will now respin the design and see if it will fit. Note that this is at 97% so it's going to be tight.

in other news my FPGA board that I bought several years ago has had some kind of failure. It no longer connects to the network and allows the ability to upload a new image.

Also the USB link has also gone down, whether there is a link to both of these symptoms I haven't been able to work out.

However I have been able to get a Bit blaster to connect and load up images. Not too sure how to get them into the flash but this is a start.