It's been an interesting couple of weeks.

Testing out the Single Complex had as you may expect a wealth of entertainments.

The Arbiter needed some TLC. Springing into copying a simple count into memory the DMA copied it to elsewhere.
Interrupts. Interrupts opened up several bugs. The first being that the interrupt needed to be extended beyond a single pulse.
Interrupts also flagged up an issue with respect to Jumps. An interrupt was successfully called but the return was incorrect. The jump was flushing out the return address before it was captured.

The Jump is now held at the Execution stage until the next instruction is just about to arrive thus keeping a valid address for the Interrupt return address.

A enhancement was put in with respect to the Branch Prediction whic means it is now more efficient.

With a simple update to the CSR registers it was possible to add in a Processor ID. The reason for this was to allow a multiple core environment which would allow a shared ROM. This allows a core to determine which one it is and then run the appropriate code. It was also very simple to add in the extra core.

By adding the Timer I can now start to work on Coarse Grain Multitasking.

So fun fun fun :).