Now have the FPGA re-imaged with the dual core image along with the LCD Character Sender. I decided to put the Secondary Trinity Core into action along with the Primary Trinity Core. So I wrote a program that works out which core it is and then updates the lines with what it is. They then send a single character to the display, pause and then send a different one to the same position. So what we have here is something that tests that the two cores can extract instructions from the same memory and then writes to two slightly different areas of data memory. Then a third agent, the LCD Character sender, reads that memory and displays it. The Primary core is sending hash and then percent, the Secondary is sending backward slash and then is supposed to send forward slash. However it's sending the Yen symbol. Possibly the Display Chip has that encoded for 0x5C. Too tired and late to work it out. Any two cores running out of the same fabric successfully being arbitrated.
Sadly not got this on you tube or vimeo and I need to go to bed !
Now Joined Vimeo so here is the short video

https://vimeo.com/user95308264/review/318308781/8decc8bfb4