I'm happy to announce that the Kestrel-3's Serial Interface Adapter (SIA) core is now hardware proven and works reliably.  This is a major stepping stone towards the evolution of the Kestrel-3 design.  The complete test circuit comes to about 495-ish look-up tables, which is surprisingly large for how limited the SIA is; however, it's at least not gigantic either.

My current roadmap from this point forward is as follows:

Port the KCP53000 away from Furcula/Wishbone and retrofit it to use a TileLink 1.7-compatible bus interface.  This will allow me to build a simple echo server so that I can fully test the SIA core, perhaps even interactively.  (I won't have any RAM to work with at this point, as the RAMA core has not yet been designed.)

Only after the 53000 processor has been ported to run on the Kestrel-3 will I start work on the RAMA core.

Once both the 53000 and the RAMA core are implemented, I can then try to port the Kestrel-3 port of DX-Forth onto the platform.  This will also involve somehow using a second SIA core for a prototype mass storage interface as well; not having the ability to load and save blocks of source code would be a severe inconvenience.  Regrettably, at this point, nothing will be DMA-driven.  But, interrupts will be supported, so there's that.

Finally, after all that is done, I can start to design the next-generation processor, the 53010.