Yann, aren't the diodes in the original diode/capacitor array idea to keep current from flowing through more than one capacitor?  What happens with your first image when you draw a matrix of even 4 caps?  When you select one of them, haven't you actually also selected a loop of the other three, too?  Maybe I missed something.

Hi,

my failure with the diodeless circuit might be the reason diodes are there.

The previous log shows the circuit "working" with the diode but in an unrealistic topology. I'll have to merge them and experiment more.

First I have to understand an unexpected behaviour with the rewrite circuit, there is some unexpected voltage drop, would this explain the failure ?

Stay tuned ;-)

I have to examine the whole system shown at http://www.northdownfarm.co.uk/rory/tim/s3SoN.PNG

I saw a patent on this implemented in an IC once (the 2D1C dram cell).  Of course, I can't find it now.  I'll see if I can locate it - I found it thinking about similar circuits a few years ago,

If you have access to an academic library (I do not), this paper might be of use:

https://dl.acm.org/citation.cfm?id=809010&dl=ACM&coll=DL&CFID=693378472&CFTOKEN=56878624

Even better:

http://ed-thelen.org/comp-hist/SEAC&DYSEAC-5-150.pdf#page=11

Awesome, I must look !

I have tinkered with the idea of using MOSFETs instead of diodes for a different implementation :-)

This one line says it all:

"An ideal diode for this application is the new silicon junction diode."

New!!!

And they are CHEAP today...

But the paper uses the case of "solid state" logic with "valve" so the diodes have a very important purpose: prevent the caps from communicating with neighbours.

In the relay-based system, the connexions and selection are "dry", non-contact so there is no way a capacitor shares charge with a line or a column.

My sense circuit is different as well, it is the "pull-down resistor" itself.

I think that the key is somewhere else, in the "selection" pulse.

Note: the PDF indicates that both A/D lines are tied to 0V for reading and writing. One of them will get some current from the capacitor, depending on the stored charge.

They don't mention the capacitance range, BTW.

In the case of TIM-8, the word lines have different roles : apparently read or write. I can't make sense of the whole diagram, the control lines are not obvious. But it's clear that the principle of operation is different because the A/D lines are not tied to 0V.

I found my old prototype and made a page for it.  It may help (or may not :-)

https://hackaday.io/page/2506-diode-capacitor-ram