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Paged TTA8 Interpreter Conclusion

A project log for 8 Bit TTA Interpreter

TTA (Transport Triggered Architecture) is very simple CPU type.

agpcooperagp.cooper 07/02/2018 at 05:070 Comments

Interpreter Conclusion

The Interpreter is written (and tested) so it is done.

But it is not the end of the Paged TTA8.

This version is much more code expensive than anticipated but still workable.

A non-paged 16 bit version would be much better.

There is still work to complete and test the hardware version.

And to add Interrupts and Serial Communications.

And finally an operating system, perhaps based on Forth.

Added the Interrupt Service Routine

I added support for Interrupts. Each time the Interpeter is called it first checks for an interrupt. Most microcomputers have an address lookup area for storing interrupt service rountine addresses (i.e. it allows software customisation). In my case I just reserved ROM page 3 for ISRs. I will come back to it later (for the serial card).

I also used a timeout on the emulator switches rather than a two clicks (i.e. one on and one off), just a nicety.

I think I have done enough to put together the hardware version of the Paged TTA8.


AlanX

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