UniversalFPGA_STE.zip

Kicad project of the FPGA_STE board

x-zip-compressed - 1.26 MB - 06/09/2021 at 19:20

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SlaveTest.zip

VHDL code for the FPGA STEbus module, to turn it into a STEbus Slave module, with 16 digital inputs, 16 digital outputs, 2 analog outputs and one analog input. See comments in the main file for details about I/O addresses used by the FPGA.
IMPORTANT : the Universal FPGA module must be configured as a Slave (see user's manual)

x-zip-compressed - 10.84 kB - 04/01/2021 at 19:15

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Universal_STEbus_FPGA_Module_User_Manual.pdf

Adobe Portable Document Format - 9.13 MB - 03/07/2021 at 08:47

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UniversalFPGA_STE.pdf

Schematic diagram of the first version of the motherboard, currently being manufactured (delivery expected for March, 11th)

Adobe Portable Document Format - 378.48 kB - 02/26/2021 at 06:10

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DE0-NANO-dimensions.ods

Converts mm to inches. Connectors not exactly on 0.1" grid!!! :-(

spreadsheet - 6.68 kB - 02/23/2021 at 02:22

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de0-nano_dimm2.pdf

Mechanical drawing of DE0-NANO

Adobe Portable Document Format - 42.08 kB - 02/23/2021 at 02:21

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