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Hi Goran! You can also post the project on here and click the submit to tips button. Or email tips@hackaday.com
Thank you, I will do that. I did send it before but it was just bunch of links. Now we have website so it would probably be better ...
Clicked the Join Project button by mistake. Please ignore !!
FYI: Here is a new kickstarter FPGA project. https://www.kickstarter.com/projects/alchitry/alchitry-digital-design-simplified/description
I need, small computer like nanoPi or other, small normal procesor with MMU for linux AND FPGA (one or two) similar epiphany.
Xilinx Zynq 7000 is equipped with dual ARM core cortex A9 and programmable logic. Have a look at ZYBO, MicroZed and so on.
The project image sums up FPGA development entirely, I still have ISE flashbacks from college
hi @Yann Guidon / YGDES @Frank Buss it's submitted bc I was testing the submit to button :/
idk about the image, it's how I was feeling the first time I opened up the fpga interface
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and it's still a nightmare that requires you to invoke an exorcist...
But Icestorm is using a Lattice FPGA, not Altera or Xilinx :-)
Not as bad as some of the FOSS GUI I have seen.
May the person with no sins cast the first stone.
well, there are pitiful, nightmarish interfaces.
Then there are those who insist and stack bad, terrible software over other layers of terrible software, that sometimes dares to do actual work...
At least the FOSS misfits can get their shit together and others can enhance it, while X & Al are the epitome of proprietary SW gone wrong.
There are free/crippled versions of these tools for light usage. As for the 4-5 figures software licensing, they only unlock the crippling on the backend.
The other thing is that the whole thing consists of commandline level front end/backend thing tied together with scripting and a GUI from some frameworks thrown on top. That reeks of un*x influence and there aren't easy way to fix GUI for any improvements. A proper GUI should be designed upfront and have code written with that in mind, not thrown together as an afterthought by another team to tack onto some scripts that calls other programs.
FOSS world is even worse as scripting and command lines are their design philosophy, so GUI is an after-thought. Try asking for help in the FOSS world. You either get the RTFM, fix it yourself, get flamed for asking the question. They write code for their own reasons not for the end users. I still remember googling for editing multiple documents in Eclipse and to my surprise someone asked for this feature and it took *7 years * for them to realize that it might have been useful and went half ass implementing it.
I have used a EDA frontend package for FPGA synthesis (with backends to multiple vendors) years ago. The frontend does most of the same things and hide the ugly stuff and let say it wasn't cheap. It crashes on me 2 times a day. Yes, they love me as guinea pig as I have the kind of luck that break things just by being there.
Based on what I have seen, these free tools are already better. The *paid* EDA world aren't famous for their GUI and user friendliness either. You have to adapt yourself to that to get sh*t done and not the other way around. This is not going away anytime soon as no one is willing to throw away the *verified* code base and design in favor of the end users.
Ice40 is derived from Ice65, Lattice bought SiliconBlue that did a very decent work with a simple architecture (however it was not performance-oriented). No wonder the bitstream is similarly simple and easy to reverse engineer :-)
X&A have accumulated so much cruft and junk over 30 years that nobody knows anymore how everything works...
Looks like it was stolen from https://www.illustrationsof.com/1212414-royalty-free-customer-service-clipart-illustration without paying the required license fees.
Why is it submitted to the Human Computer Interface Challenge ?
Wow. Good find. Decent amount of memory and macrocells. That looks like a multilayer PCB too. That's an impulse buy for me. Will see in 30-60 days.
Sadly the USB Jtag cable is more expensive than the PCB.
FYI for URL from aliexpress you can drop rest of the characters starting with '?'. They store your search context etc.
It seems to be a knock off or perhaps a surplus sale of this:
In "Bundle 2" there is an I/O extension board, albeit for a more than doubled price ("Bundle 1", FPGA board for $19.90, "Bundle 2" FPGA board + pin headers + I/O board for $20.10 more).
I wonder what functionalities I/O board provides? D-SUB connector on the I/O board seems to bring in three high speed, impedance controlled unbalanced, resistively terminated analogue lines to an ADC (U7), unless it is a VGA out connector?
There are two micro USB sockets, one (J5) leads to what seems to be a microcontroller, another (J4) probably to USB-to-UART chip (U5) which connects with two lines (Rx and Tx?) to a connector (J3, U8 on daughter board) for FPGA board.
There is a double row, right-angled 18 circuits pin socket with length adjusted traces leading to J3, perhaps some LVDS port, and one pin header in lower right, which are probably slow GPIOs.
But, for what is it all together designed? My guess is probably some picture processing, RGB or YUV to ADC to FPGA to some digital display port
I would suspect the expansion board might be from a different source as the board style is different: colour, ESD logo, company logo. The FPGA board has no logos - pretty much a no frills ready to be OEM board - just add stickers or extra logos.
The microcontroller is a cypress one with USB probably same as those USBEE clone and can be used as a fast FIFO. U7 might be video DAC possibly ADV7125 The pinout matches the RGB tracks to the VGA connector and the I/O as well.
I don't usually bother with I/O expansion or any demo board peripherals as they usually conflict with what I want to do with the I/O.
@K.C. Lee : do terminations on RGB near Analog Devices chip mean that this is a VGA input (and then the chip would be an ADC) or they would be on the signal source end of the line regardless?
Source and destination termination is used in some video applications as reflections can cause artifacts - ghosting. Most use series termination for the source side and let the monitor do end termination to ground.
Parallel termination at source (and destination) is what's specified in the datasheet for ADV7125. They are using a current source as DAC, so the parallel termination change that to a voltage.
From the hardware document for the FPGA board: (See my github URL)
>The ADV7123 is a triple high speed, digital-to-analog converter on a single monolithic chip. It consists of three high speed, 10-bit, video DACs with complementary outputs, a standard TTL input interface, and a high impedance, analog output current source. The QM_XC6SLX16_SDRAM daughter board provides 24bit(RGB888) VGA display function by using ADV7123-KSTZ140.
There is a connector on that daughter board labelled camera interface connected to the lower left corner of the FPGA board.
FYI: As a follow up to that FPGA board. The vendor sent me a URL for the Baidu download, but I don't like having to download some Chinese BaiduNetdisk_6.1.0.exe file before I can download. So I google the account and found their github. :)
https://github.com/ChinaQMTECH/QM_XC6SLX16_SDRAM/blob/master/QM_XC6SLX16_SDRAM_V02.zip
They have a few other boards there too. The daughter is described in the document
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Maybe it is time that hackaday cover our board? I have talked to Elliot on CCC so he is probably working on it, but I will post link here to... http://radiona.org/ulx3s/