Al WilliamsAs you read digital logic diagrams to try to understand them or if you ever find yourself probing an actual piece of hardware (hard to do on an FPGA, although with built-in logic analyzers and simulators, it is possible), here's a time saving tip.
Suppose you have a 9 input AND gate. If you probe the inputs you can stop as soon as you find a zero. Any one zero on the input means the output is zero. There's no other way it can be. Or, in the case of a NAND gate, it is a one, of course. The same goes for an OR or NOR gate. If you find a single one input, you can stop looking at the rest of the inputs. You know what the output has to be.
During design, we (or the FPGA compiler) can often take advantage of "don't care" states which are usually represented as an X. For example, you might see a truth table like this:
| Enable | Input | Output |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
| 0 | X | 0 |
You can interpret this as "when enable is 0, the output is 0 and the input doesn't factor into anything."
Discussions
Become a Hackaday.io Member
Create an account to leave a comment. Already have an account? Log In.
Great refresher stuff. Keep up the great work! But please take the following suggestions as constructive feedback, to minimise potential for any reader confusion.
In 2nd paragraph “Any one zero on the input…”, is confusing use of ‘one’. Suggest: “A zero on any single input…”.
In same paragraph, the sentence: “Or, in the case of a NAND gate, it is a one, of course.” On first read I thought you had your logic wrong, as you would still be looking to stop probing as soon as you find a zero input, just as with an AND gate. But I then realised you were referring to the output being a one, of course. Ideally your sentence should clarify this. Suggest: “Or, in the case of a NAND gate, the output is a one, of course.”
Are you sure? yes | no