I spent an all-nighter making a simulator for the card, which can load the schematic from KiCad, then spent an egregious amount of time in the sim making the card work. As promised last log, I will show a bit more on the simulator:
For those that prefer reading over watching, I'll do some brief explanation of the simulator, then go over the card itself.
About the Simulator
The simulator loads the KiCad PCB file, constructing a netlist and list of components. There's a (small) component library, which has a simulation model for each component type. The simulator schedules chip updates based on each IC's propagation delay, so the simulator should be largely accurate from a timing perspective too.
I love MUXes
I replaced many of the logic gates with MUXes, as it is a lot easier to understand what the logic is doing, and the logic is just so much more flexible this way. I got the idea from LUTs in FPGAs, which work in a very similar fashion. The MUXes can accept quite a lot of inputs if you're creative, since you have select lines, enable lines, and inputs - this can afford you a lot more logic per chip than logic gates.
I think I went over this in my last log but I don't remember; well, I needed to change the RAM ICs. The speeds on this board are extremely fast, with a maximum of a 32Mhz pixel clock. I needed RAM that could read/write in less than 30ns for the card to have the whole display written fast enough from the Teensy (or whatever other device). Hopefully I did my math right because I already made the card use different RAM ICs, and these are blazing fast, at 25ns. Unfortunately, this dramatically reduces the maximum graphics memory, which is now 128K (up to 262144 pixels). These numbers are halved if you use hardware double buffering. This limits the highest resolutions to 640x400, or 540x480, for example. This bothers me, so maybe I'll have to make an upgraded card in the future.
For reference, here is the RAM chip I'm using now: https://www.renesas.com/us/en/document/dst/71256sa-datasheet
Schematics and Other Details
I think the design will work, based on the simulation, so I'm finally uploading the schematics after this log is posted. This time I'll add the component libraries and such too, so there will be less issues a few years from now in KiCad 11.0, or whatever will be brewing by then.
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