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Why so many different Power Supply Voltages?
04/23/2019 at 21:43 • 0 commentsLooking back at the previous log on the CPU schematics, the FunKey device clearly needs a sophisticated power supply in order to fulfill the CPU power requirements. They are recalled below, along with the maximum current requirements found in the Allwinner V3s reference design (page 3):
- +3.3V / 1.2A for the I/O power supply
- +3.3V_AO / 30 mA for the Always-On power supply (RTC timer)
- +3.0V / 200 mA for the analog power supply
- +1.8V / 1A for the DDR2 DRAM power supply
- +1.25V / 1.6 A for the core power supply
But why in the first place are so many different power supply voltages required?
Power Efficiency
A first answer is: for better power efficiency.
As P = U x I (Electrical power is the product of voltage level by current intensity), you can reduce power by decreasing the required current or reducing the operating voltage. Assuming you already do your best to reduce the required current, you can still reduce power by reducing voltage.
Reducing Power Supply Voltage
Voltage Drop
But how far can you go? Over long distance, you have the voltage drop from the conductor linear resistance, but this effect can be neglected for small boards.
Noise Margin
You have inductive and capacitive coupling between conductive wires and planes too, but within a PCB, these coupling only have a limited direct effect on voltage. However, these coupling play a role in that they will pick up external electromagnetic noise from the surroundings and inject it into the circuit.
And with digital circuits, a critical limit when lowering the operating voltage is the "noise margin" or difference in absolute voltage levels between a logical '0' and logical '1', which determines the maximum amplitude of spurious voltage spikes that a conductor can pick up that will trigger an erroneous logic level change.
This phenomenon mostly depends on the circuit scale: a long-distance circuit between boards will require higher voltages (typically +12V or +24V) to limit this effect, whereas a circuit between boards a few meters apart or using through-hole chips on the same board wile require a lower voltage (typically +5V like the old Arduinos). Using SMT chips will allow even smaller boards and lower voltages (+3.3V is today typical), and with wires running on the same silicon die, it is possible to go down to +1.2V, given the current technological limits.
Voltage Swing
There are other reasons why you should try to minimize voltages: the core CPU for example needs to run as fast as possible, and lowering its operating voltage will shorten the signal rise and fall duration as the voltage swing is reduced.
Other Power Supply Considerations
Besides reducing the operating voltage, there are other considerations that may push to multiply the number of power supplies in a design:Quiescent Current
As for power supply used for standby operation providing small currents, a very-low leakage current ("quiescent current") is required as it can no longer be neglected compared to the current required by the light load and even more importantly because this current consumption is permanent.
Ripple Voltage
For sensitive circuits such as ADCs (Analog to Digital Converters) or PLLs (Phase-Locked Loops) which rely on comparing very small voltage differences, a "clean" power supply featuring very low ripple voltage amplitude is required to achieve a good resolution and/or accuracy. This characteristic is only possible to obtain using LDOs and not SMPS, and the figure to pay attention to is then the PSRR (Power Supply Rejection Ratio) or how much a variation in the input voltage will affect the output voltage: the higher, the better! A value > 50 dB is a good starting point.
Application to the FunKey Design
Based on these considerations, it is now clear that each V3s power supply voltage has a good reason to exist:
- +3.3V / 1.2A is used for powering the I/Os to connect between chips on the board. Given the required current, a SMPS is required for reaching a good efficiency
- +3.3V_AO / 30 mA for the Always-On power supply (RTC timer) requires a low quiescent-current, so an LDO is used
- +3.0V / 200 mA for the analog power supply also requires an LDO, this time to minimize the ripple voltage
- +1.8V / 1A for the DDR2 DRAM power supply: this strange voltage level is typical for DDR2 DRAM memory chips, and is the result of driving the large memory array inside the chip
- +1.25V / 1.6 A for powering the CPU core to minimize the voltage swing and increase the possible CPU frequency. Given the required current, a SMPS is required for reaching a good efficiency, too
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Regulated DC Power Supply Topologies
04/21/2019 at 22:06 • 0 commentsSimple DC electronic circuits can be powered by directly connecting a battery.
However, circuits usually require a constant input voltage for proper operation.
This log is a small parenthesis to explain the different regulated DC power supply topologies, before looking at the FunKey power supply schematics in details.
If you are already comfortable with this subject, you can skip this log entirely!
Linear Regulators
The easiest method to achieve this constant load voltage despite a varying source voltage is to linearly control the resistance of the regulator in accordance with the load, resulting in a constant output voltage.
Shunt Regulator
The simplest voltage regulator is the shunt regulator, built around a Zener diode which most interesting characteristic is to maintain a constant voltage across itself when the current through it is sufficient to take it into the Zener breakdown region. A simple shunt regulator looks like this:
Series Regulator
By adding a emitter-follower transistor to the simple shunt regulator, the small base current of the transistor forms a very light load on the Zener, thereby minimizing variation in Zener voltage due to variation in the load, resulting in a better regulation. Here is a schematic for this series regulator:
Integrated Linear Regulator
In integrated voltage regulators, the discrete Zener diode is replaced by a more sophisticated (but easier to integrate) circuit built around a resistor divider feeding an operational amplifier, a voltage reference, and a transistor driving the emitter-follower pass transistor:
Usually, the pass transistor and its driving transistor are combined into a single Darlington transistor plus a controllable current source like this:
LDO (Low Drop-Out) Regulator
The above circuit works well, but its drop-out voltage (the difference between the input and output voltage) is rather high because of this transistor cascade, around 1.5V to 2.5V.
By replacing the emitter-follower Darlington transistor by a PNP transistor in an open collector or open drain topology, the drop-out voltage is reduced to 0.7V or lower:
SMPS (Switched-Mode Power Supply) or DC/DC Converters
A linear regulator provides the desired output voltage by dissipating excess power as heat in the Zener diode or in the pass transistor. Hence its maximum power efficiency is VOUT/ VIN since the volt difference is wasted to heat the birds.
In contrast, a Switched-Mode Power Supply changes output voltage and current by switching non-linear storage elements, such as inductors, transformers and capacitors between different electrical configurations.
These elements are non-linear because the inductor and transformer respond to changes in current by inducing its own voltage to counter the change in current, whereas a capacitor responds to changes in voltage by inducing its own current to counter the change in voltage.
Thus, depending on the way the components are arranged, it is possible to obtain SMPS circuits that either have an output voltage higher than the input voltage ("Boost Converters"), or lower than the input voltage ("Buck Converters", as is it subtracts or “Bucks” the supply voltage).
Because of technology, power inductors are easier to manufacture, take less space and are more stable over time than their counterpart capacitors. This is why most power DC/DC converters are built using inductors. Capacitor-based SMPS are generally used for lower power applications, such as for generating the +12V and -12V voltages required by true RS232 from a +3.3V or +5V power supply in the ubiquitous MAX232 drivers.
Boost Converter
The most basic circuit for the Boost converter is the following:
If the switch is driven by a square wave, the peak-to-peak voltage of the waveform measured across the switch can exceed the input voltage from the DC source. This is because the non-linear characteristic of the inductor, and this voltage adds to the source voltage while the switch is open.
Please note that in this converter, the output voltage is not isolated from the input voltage.
Buck Converter
The corresponding basic circuit for the Buck converter is the following:
The way this converter works is described in details here. Basically, when the switch is closed, the inductor will produce an opposing voltage across its terminals in response to the changing current, reducing the output voltage, and meanwhile the inductor stores this energy in the form of a magnetic field. When the switch is opened, the current will decrease and will produce a voltage drop across the inductor, and now the inductor becomes a current source, where the stored energy in the inductor's magnetic field is restored and fed to the load.
Please note that in this converter too, the output voltage is not isolated from the input voltage.
Isolated SMPS
Isolated Switched-Mode Power Supplies use a transformer to isolate the input voltage from the output voltage, and thus can produce an output of higher or lower voltage than the input by adjusting the turns ratio.
Advantages and Disadvantages
Linear regulators are simpler than SMPS, and their linear behavior produce a very clean output voltage, but their efficiency is directly proportional to the difference between the input and output voltage, which is dissipated as heat.
However, for light loads and/or when the voltage drop-out is low, LDOs are very useful.
OTOH, SMPS are more complex and require more components, but their efficiency is much better (typically 80-90%), resulting in less heat, with the drawback of a switching electrical noise pollution of both the input voltage (that may couple electrical switching noise back onto the mains power line) and the output voltage (with electromagnetic interference (EMI) and a ripple voltage at the switching frequency and all its harmonic frequencies).
SMPS are thus almost exclusively used when heavy loads are used and/or when the voltage drop-out is important.
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STL files and Exploded view
04/19/2019 at 16:48 • 0 commentsAs with our previous projects (Keymu, Funkey Zero), FunKey was also made to share knowledge. You can already find the complete electrical schematics here, as well as a log on the electronic design here.
We've now made available all of FunKey's STL files for those adventurous out there who would like to print your own. You can find them on Thingiverse or directly here.
We will dedicate a log about 3D printing FunKey but already you should know that due to very precise needs, resin printers will give much more details than filament ones.
As can be seen from these files, FunKey's new mechanical design improved a lot over Keymu's previous one. We will get into each improvements in detailed logs but first we would like to share an overview of FunKey's design in the two exploded views you can find below:
The last one can only be found as PDF here, if you want to Ctrl+F some text.
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Schematics: CPU
04/18/2019 at 15:13 • 0 commentsAt the heart of the FunKey electronic design is the CPU block, built around the Allwinner V3s chip:
We selected this particular chip because it features a built-in 64MB DDR2 DRAM, which is very good as it saves some precious real-estate on the PCB and also because its layout is much easier: usually because of the mandatory high-speed signals, DDR DRAM requires both length and impedance-matching on all critical signals, leading to the weird "snake"-style layout to balance traces. As here the DDR DRAM is bonded to the CPU into the same package, there is no such requirement here.
OTOH, 64 MB DRAM may not seem much, but we determined that it is sufficient for our modest retro-gaming needs.
One bonus with the V3s is that it comes into a non-BGA (Ball Grid Array) LQFP128 package with actual leads, which is much more user-friendly for prototyping!
Here is the part of the schematics corresponding to the CPU core:
SoC Blocks
As one can see, there is not much besides the CPU chip U3 itself... But it can also bee seen that the CPU is in fact a SoC (System on Chip) containing a collection of built-in peripheral and memory blocks along with the CPU itself:
- the LCD / CSI display peripheral
- the GPIO port G / SDC1 (SD Card #1) interface
- the AUDIO codec
- the LRADC0 (Low-Resolution Analog to Digital Converter)
- the USB OTG controller
- the GPIO port F / SDC0 (SD Card #0) / UART0 interface
- the RTC (Real Time Clock) timer
- the EPHY (Ethernet PHYsical) interface
- the MIPI camera interface
- the built-in 64 MB DDR2 DRAM
- the GPIO port C / SPI interface
- the GPIO port B / UART2 / PWM0 / PWM1 / TWI0 (I2C #0) / TWI1 (I2C #1)
Among these, the FunKey device only uses a few blocks: the AUDIO, USB (as device only), SDC0 (for SD Card), RTC, DRAM, SPI (for the LCD screen), PWM0 (for backlight), TWI0 (for I2C bus to control the GPIO expander and power management chips) and a couple of GPIOs to power the audio power amplifier and get feedback interrupt signals from the the GPIO expander and power management chips.
CPU Power Supplies
What is remarkable though is that the V3s requires a lot of different voltages for its power supply:
- +3V3 for the I/O power supply
- +3V3_AO for the Always-On power supply (RTC timer)
- +3V0 for analog power supply
- +1V8 for the DDR2 DRAM power supply
- +1V25 for the core power supply
This profusion of different power supplies as well as the high power drawn by some of them (1.2A for +3V3, 1.6A for +1.25V) requires a sophisticated power management that will be detailed in a future log.
LRADC0
The LRADC0 (Low-Resolution Analog to Digital Converter #0) is designed to measure the voltage of a resistor ladder switched by keyboard keys: this single input is thus in theory able to manage a keyboard of up to 10 keys @ 250 Hz.
Unfortunately, the FunKey has 12 keys (U/D/L/R, A/B/X/Y, RR/RL, START and SELECT), and the resulting key detection accuracy is not compatible with a gaming usage because of long term stability problems. This is the reason why it is not used in the FunKey and just terminated by a proper low-pass filter R6/C9 to avoid picking up noise glitches.
SD Card
The SD Card interface is almost a direct connection between the chip and the dedicated SD Card connector. Only a single series resistor R8 is required on the clock line in order to prevent ringing.
Crystals
The V3s chips requires 2 crystals: one low-frequency 32.768 kHz crystal Y1 for the RTC clock and one high-frequency 24 MHz crystal Y2 for deriving the 1.2 GHz clock.
The 24 MHz crystal is used by an internal oscillator to lock the phase of the 1.2 GHz oscillator using a PLL (Phase-Locked Loop).
The 32.768 kHz crystal is used by another internal oscillator to tick the RTC (Real-Time Clock) at a standard watch frequency.
These crystals require 2 load capacitors (C12/C13 and C14/C15) each in order to guarantee that the oscillators still start and work with a comfortable operation margin taking into account voltage, temperature and aging.
The 32.768 kHz crystal features an additional high-value resistor R12 in order to limit the internal oscillator's output current and thus reduce further the RTC timer power consumption.
For more details on crystal oscillator design, please check this application note from STM.
DRAM
The DRAM within the V3s chip is a DDR2 one, meaning that its data lines are clocked using both edges of a 400 MHz clock signal.
At these high frequencies, even short wires have a length that is of the same order of magnitude as the signal's wavelength and thus each signal should be considered as a transmission line, for which impedance must be matched to avoid signal reflections, requiring termination resistors on the data lines DQx.
DDR2 or DDR3 DRAMs feature merged drivers and dynamic on-chip termination like this ("VDDQ/2" is labeled "SVREF" in our schematic):
The V3s DDR2 DRAM has an active termination calibration circuitry and procedure called "ZQ Calibration" requiring an accurate 1% 240R resistor R11 (and NOT 240K like shown in the schematic, my mistake!) connected internally like this:
More on the DDR2 DRAM ZQ Calibration subject can be found in this Micron Application Note.
This concludes the study of the FunKey CPU core schematic block.
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Electronic Design
04/15/2019 at 11:54 • 0 commentsIn the "Files" section you can find the "FunKey Rev. A.zip" file containing all the source files making up FunKey's electronic design.
The whole design is done using KiCAD release 5.0.0-rc3-unknown-14ce5182~65ubuntu16.04.1, but it should work with all KiCAD > 5.0.0 on all platforms.
Besides the schematic and layout files, this archive contains the schematic symbol and footprint libraries, as well as all the project-specific 3D parts in STEP format.
As a bonus, the archives contains too the BOM in both CSV and LibrOffice Calc .formats, as well as an interactive BOM generated by the InteractiveHtmlBom tool. This file is very handy if you need to pick & place components manually with tweezers.
Please note that this archive contains the file for revision A which has been prototyped with PCBs ordered with stencils from JLC PCB and almost all components sourced from Mouser (except for the Chinese micro USB connector and a few parts that were momentarily out of stock). The only bug we found besides bad solder joints was a BOM mistake for R11: it should be a 240R 1% 0402 resistor instead of a 240k. This resistor is used to calibrate the DRAM data/clock skew and its value is critical.
We anticipate a revision B that will correct this (small) BOM mistake, as well as some other minor concerns:
- increase the current limiting resistor for the LED R26 to reduce the light intensity
- swap the battery and screen connectors J5 and J3 to simplify the screen flex design
- drive the screen RESET signal from a CPU (U3) GPIO rather than automatically from the PMIC (U5)
- find a way to solder the loudspeaker using a better method: currently, we use through-hole resistor legs to solder the speaker to the PCB 8-)
- increase the test pad diameter from 0.5 mm to 1 mm, they are way too small today
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Electronic Parts
04/12/2019 at 21:34 • 0 commentsThe main part in the FunKey device is of course the CPU: an AllWinner V3s SoC with integrated 64MB DDR2 DRAM. Not much compared to a Raspberry Pi for example, but it turns out it has just the right capacity for our purpose, and a minimum size because of its integrated DDR2 RAM, without the length and impedance-controlled constraints on PCB trace requirements.
The V3s also features a low power consumption and all the required peripheral that we need.
The V3s CPU is generally used with a companion AXP209 PMIC chip in charge of supplying all the required voltages for the CPU: +3V3, +3V3 (RTC), +3V0, +1V25, most of these using integrated DC/DC buck converters or simpler LDOs for the ones requiring the less power. The AXP209 also features an integrated Coulomb counter for monitoring the available battery power, as well as a soft-power switch controller that acts just like the one in your smartphone!
A separate AP3418KTR-G1 DC/DC converter is sued for providing the DDR2 DRAM +1V8 power.
The second most important part in our design is probably our small 1.5" LCD screen. It has an amazing 240 x 240 pixel resolution, while using a simple SPI-based interface and not a complex DSi interface based on the differential high-speed MIPI specification, which requires a dedicated controller that is only available in higher-end SoC:
For audio playback, we wanted to have an internal speaker. But given the reduced dimensions, we tried to find the smallest available one, which has a very small 10 mm diameter, with a total height of 2.9 mm, out of which 1.4 mm can be inserted into a PCB hole, thus only having a height above PCB of 1.5 mm:
We use a simple mono audio playback through a PAM8301AAF amplifier. This amp has all the required characteristics, with a filterless (no capacitor) design.
After testing tactile domes in our FunKey Zero prototype, we decided to go back to standard tactile switches, as their placement can be done by a regular SMT pick&place machine with a very good accuracy, just like all the other components on the PCB, unlike the tactile domes which require an adhesive tape to place them, making them less accurate in their absolute positioning.
We also need some right-angled tactile switches for the rear left and right buttons:
We took the smallest we could get, but we may experiment with softer (no-click) ones for the rear buttons to bring a better play experience.
For the microUSB connector we choose a common mid-mount model with through-hole pins in order to avoid tearing it off the board if you don't pull the chord straight.
The only remaining mechanical part is the small DF37NB-24DS-0.4V(51) connector, matching the LCD screen connector.
For debug, we features a 3-pin 1.27 mm pitch header, with console UART RX, TX and GND pins.
The only remaining active part is a P-MOSFET used to drive the screen backlight from a V3s GPIO pin.
We use TVS diodes on all user-accessible parts to prevent ESD (these are small 0402 TVS), and a dedicated USB ESD protection a close as possible to the USB connector.
All other parts are passive resistors, capacitors or ferrite beads in 0402 form factor whenever possible, as we don't have a lot of available real estate on this board.
As you can see, none of the components was chosen randomly, and finding the right part took us a significant amount of time!
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Alive and kicking!
04/12/2019 at 06:13 • 0 commentsThe first prototype only had a solder bridge between 2 SD Card connector pins, preventing it to boot from the card. It took us a few days to figure it out.
Here is the second prototype, which caused us more headaches: one of the power inductors was broken, some solder joints were not good, and the big V3s CPU chip (LQFP with 128 pin) was offset by almost one pin. We had to remove it completely and solder a brand new one in place. First, it didn't work, but we eventually had the board booting after pouring solder paste from below the chip to have its central die pad connected to GND.
How fun is hardware debugging!