Transparently encrypting SD card adapter

Now we have the basic hdl code.  We added software to create images.  We can now connect the development board to a card reader and access it like a real SD card.  We haven't added software to do RSA encryption and key generation yet.  Maybe the key can be generated with the FPGA's 16-bit ADC.

We now have the SD card interface, SD host interface, and XTS-AES IP cores. Hopefully that means only a little more HDL coding is needed for the first prototype.

The XTS-AES IP core saves keys in SRAM instead of flip-flops to save resources. We need to find out whether it comes with security implications.

We have a mostly working SD device interface connected to an AXI4 LITE

bus.  It generates responses on its own.  There will be about 100ms at
least for the CPU to react to commands that involve the CPU.