Despite not posting an update, progress continues. I have written the low level core driver code to test setting and clearing bits, and am working on trying to detect the state of a bit. This has turned into a lot of time spent probing with an oscilloscope verifying that the current is flowing in the proper wire, in the proper direction, and with enough juice. And this is where the weakness of the circuit design has become apparent.

I've been able to sense some cores, but not reliably. I think there are three issues I'm dealing with:

1) Core/MCU voltage selection. The transistors are driven with 3.3V but the power from the battery is above that. When it is too high, half of the transistors aren't turning on like I expected, because of physics. Short-term I'll use an auxiliary 3.3V supply. Long-term, this design may require tighter voltage regulation for the cores, instead of taking whatever the battery has available.

2) Transistor Vce drop. The drive current capability of the MCU is very weak, and with the voltage drop of the transistors (three in series), there isn't much left to work with to magnetize a core. I'm seeing ~300mA for each half select current is marginal at setting cores. And increasing the battery supply voltage above 3.3V makes the situation worse because the transistors fail to switch around 4.2V, without an increase in drive current. Short-term I'm going to test darlington transistors and MOSFETs. 

3) Sensing signal circuit. This may come down to biasing in the sensing circuit that needs to be tuned. Fairly consistently, I see the core is set in one direction or cleared, but then not in the opposite direction. This could also be because the drive currents aren't high enough because there is a difference depending on which direction the current is flowing. I can clearly see how the sense signal timing varies based on the current through the cores. It affects how quickly the core snaps to the opposite polarity. I'll circle back to troubleshooting this after I get #1 and #2 pinned down.