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Optimized ALUs for Relay based Computers

Never think it's impossible until mathematically proven!

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The ALU is one of the key components of every computer, and especially the ones built with relays that have limited numbers of external components.

Until pretty recently it was thought that to implement a full adder the ingenuous Konrad Zuse's design based on 2 4PDT relays for each bit was a very efficient one.

Recent discussions proven instead that this limit could be surpassed, and in fact various proposals are diminishing the overall number to be used and/or increasing the functionalities offered with the same number.

This project would like to propose these new designs and discuss the optimal builds available, and to improve even more if possible. A stronger focus is put on 4PDTs designs in order to try to diminish the total number of relays, and the overall price of implementations (the 4pdt are usually just marginally more expensive than their spdt or dpdt counterparts).

In order to differentiate the proposals there are 2 options to be considered:

  1. Utilization of diodes or not
  2. Utilization of the 0 Volt or alternatively the "disconnected pole" for the "logical 0" value

For a comparison the 8bits Konrad Zuse's implementation uses all the poles of 16 4PDT relays to perform "just" the ADD functionality. It uses the "disconnected" design and no diodes.

The best "disconnected" design up to now seems the one proposed here on hackaday by Roelh in his "No dollars" version of the "Simple Relay ALU" project (https://hackaday.io/project/162246-simple-relay-alu/log/169305-if-you-dont-have-any-dollars). This design allow for the ADD and all the 16 possible functions of the bitwise combination of the two registries (AND, OR, XOR, XNOR, NAND, A, NOT A, etc.). The relays used for 8bits are 24, but 8 of them could be saved reusing two free poles of one of the registers, so effectively needing just 16 relays as in Zuse's one (and even 8 of them can be DPDT). Two relays more are required for the SHR to be implemented if needed. No diodes are used.

The below design (originally proposed on the page https://hackaday.io/page/6554-optimized-alu-for-computers-with-4pdt-relays) is instead propably the best proposal for the "0 Volt" alternative: with no diodes and 12 relays for 8bits is able to deliver ADD, AND, OR and even SHR (and also SHL using ADD of course).

A part from A, B and Carry bits, the input to the relay are F0 and F1 that determines the outcome of the bitwise logic: F1 will receive the input directly from the instruciton, while F0 utilize a 2:1 multiplexer (built with 2 relays for 8bits) to select for each bit among the nth or n+1th bit of A. At the exit a another 2:1 multiplexer is selecting among Add or BitWise result. Removing SHR and leaving just F0 and F1 controlled from the instructions the Relay count go down to 10 leaving just ADD, XOR, XNOR (and the trivial SET and NULL). With a slight different connection and still 10 relays is possible to have ADD and AND (instead of XOR/XNOR), as originally proposed by JHallen in his "Single Board Relay Computer" (http://relaysbc.sourceforge.net/circuits.html).

Using 16 relays and still no diodes is possible to add all the other functionalities (keeping also SHR). Below An alternative design to the one proposed on the original page (https://hackaday.io/page/6554-optimized-alu-for-computers-with-4pdt-relays) that is even freeing up one of the 4 poles of the logic relays:


Here F0 is selected with a 4:1 multiplexer (6 4PDT relays for 8 bit) and F1 with a 2:1 one (2 4PDT for 8 bit). There is no need for a multiplexer on the output since the result of ADD and logic functions is already combined.

Honorable mention deserves the best proposal with diodes again coming from Roelh (the main one presented in his "Simple Relay ALU"), that with a genious design is able to save a lot of poles (it uses 8 DPDT plus 8 SPDT for 8bits) providing 10 functions, including SHR, but at the expense unfortunately of 80 diodes. Using the same 16 relays but 40 diodes is possible to have ADD, AND, OR, XOR, XNOR. These designs use the "0 Volt" logic.

As additional note, all design proposed (and also the original Zuse's one) can be extended to an arbitrary long number of bits since there are no delays accumulating (e.g. from carry ripples).

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