Handling interrupts is very easy : these signals are treated like a IPC instruction.

Each class of interrupt (such as maskable, non-maskable, system, IO, SW faults...) has a dedicated register with the n° of the thread (and its thread descriptor address) that manages it (plus a "ready" flag). Vectored interrupts in the class are managed through the IPC service n°. Thus there is very little special hardware to add, and no new instruction.

A handling thread must be spawned ("pre-fork" in other contexts) before the interrupt source can be serviced.

There is no other requirement (yet), there may be as many classes as necessary and possible.

The interrupt registers are not specified yet.