A project log for Integrated Circuit Tester & Exploratory Tool
Interactive tester and exploratory tool for logic chips
In my earlier log I was trying to make sense of what I was seeing with the stray capacitance of the GPIO pins when disconnected. I was confused because the effect of the capacitance on the disconnected pins was persisting for up to 20+ seconds. My understanding was that the GPIO pins has a resistance of 100MOhm and the capacitance of the pin + the trace+ the zip might be the order of 20pF. With those vals I ended up with an RC of 0.002 seconds; several order of magnitude too small to explain the phenomenon.
Howeven Ken Yap commented that the input resistance of CMOS might be as high as 10^12 Ohms. Putting that into the calc instead yields an RC of 20 seconds. This is right on the mark for the sorts of decay I'm seeing and I'm happy to accept that as a full explanation of what I've experienced.
Thanks for yout help Ken.
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