The panels use the SM5266PH row select ICs.  These ICs are shift register based and make the panels incompatible with standard HUB75E ABCDE addressing.  The working panel pinout is as follows:

• A - shift register clock, positive edge, should be clocked every row
• B - shift register data, high -> row on, low -> row off, should set to high every eight row
• C - blanking, timing/purpose unknown, should be kept low to enable outputs
• D - async output enable, should be set to 3rd address bit
• E - async output enable, should be set to 4th address bit