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• Finishing touches

  James Wilson • 05/03/2020 at 17:15 • 0 comments

  I thought i called it a wrap on this project, but there were still a few small things to investigate. Here are the changes I made, which now puts things in a finished state.
  

  Increase switching frequency to 120 kHz. At 100 kHz, the peak current on the transformer primary side would exceed its saturation rating (3 A). In DCM, the peak current is independent of the input voltage. Based on an load current of 30 mA, 120 kHz provides a better solution for keeping the primary-side current within datasheet limits.
  

  Changes to current sense network: increase R_sense to 33 mΩ and remove R_SL (use a 0 Ω jumper). DCM is stable without an artificial ramp, but simulations showed the converter can drop into CCM for transients at low input voltage. Unfortunately, there is no combination of R_sense and R_SL that simultaneously limit the peak current to 3 A and guarantee stability in CCM at this low frequency, while respecting the 2 kΩ limit on R_SL. The biggest transient is at startup, and CCM operation can be prevented there with a generous soft-start time. Simulations showed effects on the load-step transients were tolerable, so I decided to use a R_sense, R_SL network that would solve for the peak current limit only. As a consequence, it's expected the output voltage will droop when the load current exceeds 30 mA as the LM5155 is limiting the current to protect the transformer core from saturating. The lower switching frequency also means a larger filter capacitor is possible, so C11 was increased to 22 nF.
  

  Increase soft-start capacitor to 47 nF. Simulations showed a longer startup time keeps the converter out of CCM during startup. This choice more than doubles the startup ramp time to about 5 ms.
  

  Improve compensation network. I derived an analytical small-signal model of the flyback in DCM-CPM, which informed better choices of the compensation network. I also made an error in the previous script and forgot to include the PWM gain factor (parenthetically referenced in tiny text on the LM5155 datasheet ... thanks TI). In DCM, the low-frequency behavior of the loop is approximately a single-pole system, with identical gain and pole frequency to a buck-boost controller. Without a RHP zero in the model, there is no obvious and natural choice for a HF pole, so I removed the second capacitor and used R = 33 kΩ and C = 680 pF to set the crossover at 12 kHz with 60° phase margin. These charts show the predicted and measured results. The converter now reacts to 5 mA load steps so fast, it wasn't even possible to capture them on the scope.
  

  These changes deliver a small hit to the efficiency and limit the output current, but this is to be expected. The converter still achieves about 90% efficiency at high loads at 9V and 12 V input. Efficiency calculation were omitted after the converter hits the current limit.

• Rev. B evaluations and wrap-up

  James Wilson • 04/30/2020 at 01:49 • 0 comments

  The rev. B boards arrived and I assembled three of them with the remaining parts. The differences are  subtle:
  

  • the input capacitors have been moved adjacent to the transformer, with a clear return path on the bottom side ground pour
  • loop gain circuit was scrapped and replaced with a single 20 Ω series resistor for use with an injection transformer

  The resulting board is slightly smaller.

  Experimental validation of the feedback loop bandwidth

  After all the modelling done in a previous section, how good was it? Following the procedure in AN-1889, I connected a 1:1 injection transformer across R12. This transformer is a homebrew device with a bandwidth of 40 Hz - 2 MHz. One side was connected to my scope's built-in function generator, and the other side was soldered across R12. I used the oscilloscope's frequency response analysis tool to produce a Bode chart of the converter's feedback loop.
  

  For the original configuration in the design work (fs = 350 kHz, Vin = 5 V, Iout = 30 mA), the measurement shows crossover is at about 9 kHz with a 51° phase margin. The model prediction was crossover at 8 kHz with a 60° phase margin. The shape of the gain and phase curves shows good agreement to the model. If I were going to keep using this configuration, I might tune the compensator's zero frequency to get a little closer to the target phase margin.
  

  For comparison, here is the model prediction:

  One of the changes I explored was dropping the switching frequency to improve efficiency. The LM5155 can go as low as 100 kHz, and I made an experiment with fs = 150 kHz earlier, noting that the compensation network might need adjustment. Now that I have the means to measure the loop from a point of relative stability, why not try the practical approach of tuning the components from a real circuit? After the amount of work that went into modelling the CCM transfer function, I'm in no hurry to do a model for DCM if only a minor adjustment is required. The remaining boards run at 100 kHz, so I repeated this experiment at Vin = 5 V, Iout = 30. The results are almost identical.
  

  To see how DCM affects the loop dynamics, next I put the converter as deep into DCM as I could by running it at the highest input voltage and lowest current (12 V input and 5 mA output). Here the crossover frequency drops to shy of 5 kHz, with a healthy phase margin.
  

  Before wrapping up this test setup, I also looked at middle-of-the-road configuration: 9 V input, 25 mA output current.
  

  My conclusion is to stick with the current compensation network. Often what happens with DCM is the right-hand plane zero gets kicked out beyond the switching frequency, so using 1/10*fs is a common choice for the crossover, and this shows it's already set close to 10 kHz with a good phase margin. The step load transients (measured on rev A adjusted to 100 kHz) show good response in the time domain as well.

  Revisiting voltage ripple and primary snubber

  One of the changes was to improve the layout around the input capacitors. For comparison with rev. A, this time I measured the input ripple across the input capacitors, both converters operating at 100 kHz. This shows about half the ripple, with the smaller 1 µF capacitors taming some of the spikes.
  

  A lower frequency means increased output ripple since I didn't change the output capacitance. At 100 kHz, the voltage ripple increases to 1.4 V (p-p) at full load. This is still less than 1% of the DC level, and Nixie tubes do not need flat DC. Nonetheless, this could still be improved by increasing capacitance, with some possible adjustment required to the feedback loop. In this this package, film capacitors up to 470 nF are available, which would roughly double the output capacitance. For the target application, I'm fine keeping the pair of 220 nF caps.

  While looking at rev. A modified to run at 100 kHz (with the snubber removed), the switch node voltage saw peaks approaching...

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• Going ... discontinuous

  James Wilson • 04/28/2020 at 04:58 • 0 comments

  While I'm waiting for the rev B boards, I tried an experiment to reduce the switching frequency to investigate its effect on efficiency. I replaced the timing resistor (R8) with a 150 kΩ resistor, which coincidentally, yields a 150 kHz switching frequency on the LM5155.

  At lower switching frequencies, the converter will run in discontinuous conduction mode (DCM), which means the current in the inductor goes to zero in the off state. DCM makes much of the mathematics more difficult, and requires reevaluation of many component choices, but also has some positive effects. I ran the calculations for the current sense network and found the same sense resistor works. One of the consequences of current programmed control in DCM is it is stable without any artificial ramp. Nonetheless, simulation showed the converter is in CCM during startup, so the original slope compensation resistor choice prevents subharmonic oscillations. The compensation network will need changes, but an analytical model of transfer function of the CPM-DCM flyback converter will need some work. For this experiment, simulation showed the existing compensation network is adequate for stability.

  I performed the efficiency measurement again, and the results speak for themselves. The lower switching frequency and DCM operation greatly improves performance. The converter achieves peak efficiency over 90% and is in the mid- or high- 80% range across the input voltage range! The transformer remains noticeably cooler, and while the converter hit the current limit at Vg = 5 V and R = 3.4 kΩ (what should have been 50 mA output), it did not show the same thermal runaway.
  

• Prepping for rev B

  James Wilson • 04/24/2020 at 17:31 • 0 comments

  What worked out well with the initial build:

  • Converter maintained voltage regulation well beyond the 30 mA output design limit
  • Output ripple was well-controlled
  • RCD snubber proved to be unnecessary to protect the MOSFET
  • Load transient response demonstrated good loop stability

  What was a disappointment:

  • The no-break injection circuit didn't work at all and destroyed both the MOSFET and diode on one prototype
  • Input voltage ripple shows large spikes
  • Efficiency remains close to, but below, 80% under full load
  • Thermal problems at high load and low input voltage

  Since everyone is still going nowhere, I sent off a second board revision for manufacturing with a couple of changes:

  • I removed the no-break injection circuit and replaced it with the more "traditional" way of doing voltage injection by breaking the loop across a small series resistance. This method is documented in TI's AN-1889 and requires a wideband injection transformer. These are a bit of a back-catalog item of test equipment, but it turns out they are eminently homebrew-able with excellent results.
  • The ceramic input capacitors have been moved next to the transformer, with a solid ground plane underneath. Additionally, I added a couple of footprints for some 1 µF or smaller capacitors. Throwing additional capacitance in has diminishing returns, but it's easy to leave them unpopulated if they also prove to be of no help. This change also means I can trim 5.5 cm^2 of board space without increasing component density.

  The efficiency of the converter could be improved by using a lower switching frequency to reduce switching losses. The choice of switching frequency was driven by the limit I chose on inductor current ripple. Lowering the switching frequency will increase the current ripple and increase the minimum load where the converter begins to operate in DCM. It will also precipitate re-evaluating most of the passive component values, so I'll leave this be for the moment.
  

• Parts swapping and efficiency measurements

  James Wilson • 04/21/2020 at 05:19 • 0 comments

  I got a shipment with the 600 V-rated ES1J and the VS-3EMH06-M3 diodes. How does a "hyperfast" rectifier compare to the "ultrafast" part I started with? Looking at the voltage on the rise time on the secondary shows it's close to twice as fast (47 ns vs. 90 ns). Already it appears the switch node ringing is starting at a higher amplitude.
  

  Probing the switch node shows a ringing waveform that looks much closer to the simulation. At the maximum inductor current condition, the voltage spikes are still 10% below the MOSFET Vds limit, without any snubber.
  

  Lastly, the reverse recovery situation looks about the same, with the reverse voltage spiking to 530 V.
  

  Overall, it seems this new diode is nothing special by comparison, but the 600 V rating is important given the voltage ringing during reverse recovery.
  

  Efficiency measurements

  I waited to make efficiency measurements because I wanted to settle on a configuration to use after considering options for the snubbers or other adjustments. For this test, the measurements were taken with the VS-3EMH06-M3, and without RCD snubber network. I used the source display on my bench power supply to read the input power, and measured the voltage at the converter's output terminals and the current between the converter and load board. Of course, it'd be nice to do all this with ATE that would gather the data while I made on some coffee, instead of by hand ... perhaps someday.
  

  At 9 and 12 V, the converter is about 75-80% efficient, with a sweet spot around 15-20 mA where it peaks over 80% with 12 V input. It would have nice to be consistently above 80%, but it appears core losses in the transformer are the limiting factor. It is easily the warmest component on the board during operation.

  I didn't take measurements at 5 V beyond 35 mA, because at high load, the current in the transformer is high enough that causes a thermal runaway. Heat increases resistance and voltage drop, so the converter adjusts by increasing duty cycle and average current, which further increases heat. Eventually the converter hits the current limit or the transformer core begins to saturate. At the 5 V, the converter should be thermally derated to 25 mA maximum current to keep the transformer from overheating, unless active cooling is done.

  The last parts experiment I had was to test polypropylene (PP) output capacitors. PP is supposed to have lower dissipation factor by an order of magnitude compared to polyethylene terephthalate (PET), so it should handle pulse currents better. Would it help improve efficiency beyond the 75-80% level? I replaced the output caps and reran the efficiency experiment. The result was basically a wash. A few fraction of percentage points here, a few there. No data point changed by more than 1 %, which doesn't justify their added cost.

• More evaluations

  James Wilson • 04/19/2020 at 22:20 • 0 comments

  The previous update looked at voltage ripple and transients. Another important area to investigate is the switching waveforms. This shows the switch node and gate voltages.

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• First evaluations

  James Wilson • 04/19/2020 at 19:47 • 0 comments

  The boards were produced by JLCPCB and in my hands within a week, very nice considering concerns about the global economy at the moment. I assembled identical boards, one as a reference and the other to be poked and probed, and sacrificed if needed.
  

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• Prototype layout

  James Wilson • 04/18/2020 at 23:29 • 0 comments

  For this project, I wanted to justify all component values from first principles. On the other hand, for PCB layout of a SMPS, I'm more than happy to copy a layout that works. In this regard, the datasheet for the LM5155 provides very helpful layout guidelines and examples, and the engineering team at TI also produced three evaluation boards (in boost, isolated flyback, and SEPIC topologies) that also demonstrate good layout.

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• Simulation

  James Wilson • 04/18/2020 at 19:48 • 0 comments

  With components selected, it's time to move toward realizing this converter. The next step will be testing the design in a circuit simulator.
  

  People like to gripe about LTspice's outdated UI, but I've gotten pretty fast at sketching up circuits with it. Unfortunately, the LM5155 SPICE model is encrypted and only works in TI's SPICE variant, TINA-TI. TINA-TI is free to download and use, but LTspice is in many ways leagues better. Want to peek at some node voltage? In LTspice, just click on the node in the schematic after the simulation is done. In TINA-TI, the transient simulation only records voltages and currents for explicitly added meters, so that means adding a meter and re-running the simulation.

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• Closing the feedback loop

  James Wilson • 04/18/2020 at 02:21 • 0 comments

  A converter needs a feedback mechanism to maintain voltage regulation. The choice of a duty cycle only works for a particular set of load resistance and input voltage. Variations, large and small, need to be corrected to maintain a stable output voltage level. Feedback loops are fickle things, and unless carefully constructed, can become unstable. Stabilizing the feedback loop is the purpose of the compensation components attached to the controller chip.

  There are few ways to determine how to compensate the loop, generally it's either relying on some intuition (or cribbing from something known to work) and then experimentally verifying it, or it's deriving an analytical model of the converter's feedback loop and solving for the optimal component values. I'm going to try to do the latter in this log. Unfortunately, the derivation alone can take pages, even with a background in control theory, so I'm unsure how much to document. I can always add detail on request.

  The LM5155 control loop

  This is a simplified view of the control loop of the LM5155. The "hat" notation refers to small-signal variation, i.e. a linearized model of how the system behaves when values are perturbed from their normal DC operating point.

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