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• Short description of implementation

  Tim • 02/23/2021 at 20:28 • 0 comments

  I am planning to provide a more detailed description of the design later. Just a quick summary for now. The design was simulated in LTspice, implemented in EasyEDA and manufactured at JLCPCB. It works nicely in real life, although I had to tweak timing a bit die to a slight mismatch in transistor models.
  

  The top level circuit is shown below. All blocks are implemented in resistor transistor logic (RTL). The purpose of the "stage generator" and "data director" is to control the flow of the input signal. It is either steered towards the decoder or towards the next device. The decoder will turn on the LED if a long signal is received and turn it off if a short signal is received. This is basically the same protocol that is used by the WS2812 with the exception that only a single bit of data is received by each LED instead of a full 24 bit RGB value.
  

  The state generator consists of a retriggerable monoflop. It will essentially trigger after reception of the first pulse and cause the data director to forward any additional input signals to the next device instead of the protocol decoder.
  

  The data director is a multiplexer that is implemented with two RTL NOR gates and two inverters. The circuit is straightforward and shown below.

  The circuit of the decoder and latch is shown below. The monoflop consists of the three transistors on the left. You can see the latch in the center and finally the LED+driver on the right side.

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