There are other projects like this one out there, but none of them is Open Source and none of them comes with both schematics and board. This is a big advantage, since anyone can modify the board and make new improved versions.
Open Hardware Remake of this Commodore Masterpiece
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There are other projects like this one out there, but none of them is Open Source and none of them comes with both schematics and board. This is a big advantage, since anyone can modify the board and make new improved versions.
I have been working to maximize Ramixx500 V2’s analogue RGB video output and interestingly I have found few improvement points that are essential:
In the Amiga environment the jail bars are probably generated by peak noise induced by a floating _CCK (clock out for the genlock) and empathised by bad quality shielding/grounding at cable ends, regardless the resolution or de-/interlaced PAL/NTSC video modes.
Tested with:
(schematic from amigawiki)
The new video hybrid “Vidiot” board is based on the AD724 RGB to NTSC/PAL Encoder. It provides sharp and colourful CVBS (composite) and S-Video (Y/C) output signals, in addition to analogue RGB. It is compatible with Ramixx500 V2 and future developments. The board can be mounted either horizontally and vertically (to accommodate RGBtoHDMI or accelerators).
S-Video:
Composite:
RGB:
Tested with:
Since Edoardo has been on a testing spree and the test activities on V2 were completed in a breeze, I think it's about time to shed some light on the improvements that we added in this revision so, without further ado:
Of course these add up to the Support for VBB Agnus, Mono Audio Link, Alternative Power Connector, Kickstart Switcher, Drive Switcher and other minor tweaks that were already introduced in V1.
We hope that you enjoy the show.
The printed circuit board of Ramixx500 offers an improved dissipation. Overall it is about -3°C colder than the original Commodore Rev. 8A.1.
Particularly, we observed improvements across the following surfaces:
A good strategy was to use a solid ground plane under the main heat source, minimizing the thermal resistance and maximizing the heat dissipation. Consequently, we have avoided fragmented ground planes on both layers and eventually we have considered narrowed power tracks.
Thermal cycle:
OFF > Cooldown 120 minutes > ON > Warm-up (kickstart screen) 30 minutes > Load condition (ECS game) 55 minutes > Screen capturing 5 minutes > OFF
The whole PCB
Left: Ramixx500 V2, Right: Original A500 Rev 8A.1
CPU and FAT Agnus
Left: Ramixx500 V2, Right: Original A500 Rev 8A.1
Denise and HY
Left: Ramixx500 V2, Right: Original A500 Rev 8A.1
Paula, CIA and RS232
Left: Ramixx500 V2, Right: Original A500 Rev 8A.1
Gary and Audio section
Left: Ramixx500 V2, Right: Original A500 Rev 8A.1
RAM chips
Left: Ramixx500 V2, Right: Original A500 Rev 8A.1
Condition:
Equipment:
The characterization test aimed to describe (characterize) the actual behaviour of the existing piece of hardware. The following verification of Ramixx500 V2 was executed:
Conclusions
To conclude, the major contributions of this work are as follows:
The presented power-aware design and test methodology provide an insight into the impact of within silicon and within PCB layout variation. Information regarding CAD versus silicon correlation derived from the test results helps to efficiently optimize CAD models.
A test circuit for accurate characterization of delays in clock and data paths for evaluating the extra timing margin available in silicon has been considered. Understanding the sources of extra margin aids in precisely establishing de-rate added during sign-off that fail-free operation can be ensured while deriving maximum performance from a given circuit.
Future Works
Based on the lessons learnt concerning layout design and chip tests for electrical and thermal characterization, in the future, we may consider implementing a comprehensive reliability/performance management strategy. Further increase in energy savings can be achieved by replacing Fast Page DRAM (440mW @ 5V per unit, in total 3.52W for 1MB) with SRAM (1W @ 5V in total), for example. Moreover, we have overcame known mistakes and limitations hence ensuring the original concept of "Rock Lobster".
References:
Benchmark / Diagnostic:
Expansion & Accessories:
Power Supply Unit:
Tools & Equipment:
Chipset:
Operating System:
Storage:
Condition:
Having passed the memory test, I thought it was time to play games!
However, OLT second phase is about to start...
The first part of OLT is giving positive results.
Assuming you can connect your Rämixx500 directly to an LCD monitor capable of analogue 15KHz sync (no scan doubler/flicker fixer), please mind setting the accurate Pixel Clock (value 90 to 95) and Phase (value 40 to 45).
A very different value selection may cause visible vertical jail bars. In other words, do not use the AUTO setting. In addition, your monitor may require H- and V- SYNC buffered.
If you notice a vertical noise (like a curtain effect-shimmering of vertical lines), Pixel Clock Adjusts the pixel clock frequency timing to synchronize with the analogue input video signal until the noise disappears.
Phase Adjusts the pixel clock phase timing to synchronize with the analogue input video signal until the noise disappears.
If you have installed the RGBtoHDMI Raspberry Pi adaptor, please be informed that Pixel Clock and Phase are not applicable to a digital input signal.
The recommended values, selected after the benchmark between the original 8.1 and Rämixx500 motherboards, are the following (BenQ G2420HD model):
The Operating Life Test (OLT) is running...
The basic manual assy is finished. Now it is time for visual inspection and ensures correct polarity and no cold joints.
The good thing is that all supply voltages are stable and within spec. The oscillator outputs a nice square signal of 28.37MHz.
Next step: ICs installation and smoke test.
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Really awesome to see the continued work on the Rämixx500! So, is this the V2 as you mentioned on the Rämixx Github page?
Hi Christopher, sorry I didn't notice your comment earlier. Not sure I've mentioned V2 anywhere on Github... yet. AFAIR There's only an issue describing possible future improvements on V1, some of which made it to V2.
No worries! 😀 The page I refer to is https://github.com/SukkoPera/Raemixx500/issues/20 .. I also found your thread Possible Enhancements, really nice thread going through possible new features!
My heart warms up. The Amiga 500 was my very first computer in 1990.
31 years ago ... ;-P
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Just been building up a V2 board - finally after waiting months for components. Got a bit of an issue with it though. Anyone had any success or pointers before I get elbow deep in looking for errors