I modelled the 17.5mm square I wanted inside the main Tetrinsic file and then clicked through some menus to make it a PCB border. Then I linked the schematic:

The background music of my mind upon seeing all those passives: [00:00 - 00:12]

Me: It looks like space invaders! It's going to be near impossible to fit all those on!

Me, 2 hours later:

It suprisingly all fits, even when trying to keep bypass capacitors nearby to their respective chip. Obviously, this can all change once vias are introduced.

It's nice to see what a 3D version of the board could look like. I'm planning to coat everything in white silkscreen. Everything is so dense that there's really no point of marking anything.

Pardon?

Fusion 360 to the obvious line I was about to drive: [00:01 - 00:19]

Ok an hour of research (to find out that this is a legit thing that Fusion 360 doesn't support even though why else would you derive a PCB from a sketch in the design??) and manually setting up a new link later... I've fixed it.

I've even figured out how to coat everything in silk:

I think leaving the other side as green is a nice contrast.

It slots into the available space nicely.

And now it's 4:40am, working on Tetrinsic for approx 15 straight hours.