* * OVERVIEW * *

Studio 68 is a board to make retro-computing "experiments".

It has a 68SEC000 CPU, a STM32F030R8T6 MCU + USB + SD, a 16MWord SDR DRAM and a 208pin FPGA. So It is possible use an approach based on virtual HW emulated using the STM32 MCU or synthesized inside the FPGA (or a mix of both).

Here the Block Diagram of the Studio 68: there are two main connectors, the GPIO and the EB (External Bus).

The (SHARED) GPIO allows to use little add-on boards/adapters as the one to give a VGA/KB output (the VGA/KB core must be implemented inside the FPGA).

The EB is an external bus. It allows to add a board for virtually any CPU to make experiments and emulate peripherals HW inside the FPGA:

The STM32 part of the Studio 68 board is compatible with the Discovery development board by ST with the same STM32 MCU (32F0308DISCOVERY), so it is possible use Arduino IDE (with the ST core) as quick development environment selecting the Discovery as target board and the serial upload mode (the Studio 68 has a circuitry to use the STM32 embedded serial bootloader with Arduino IDE to enable "automatic" uploads):

Here a test running on the onboard 68SEC000 CPU using a test VHDL to implement some RAM and the needed I/O registers to handle a serial port (the serial port is physically implemented with the STM32 that exchanges data with the I/O registers inside the FPGA):

The 4-layers PCB of the Studio 68:

The board (almost) assembled:


* * PROJECT STATUS * *

The Studio 68 board is currently under development/testing.

Current related boards (by HW reference code):

All the documentation needed to build the boards (schematics, gerber, etc.) will be published when ready.


* * Z80 CPU (T84C00AM) APPLICATION BOARD * * 

Thanks to PCBWay that kindly offered me to produce this new beautiful 4-layer PCB, I've done a Z80 Application Board (APB) to try out this CPU (T84C00AM) with the Studio 68 board:

It is a self-powered board as Studio 68 doesn't power what is connected to the external bus (EB/EBE).

Here the Z80 APB + the Studio 68. The Studio 68 acts as "slave" with the 68SEC000 CPU held in reset to keep its data and address bus in high Z, exposing the RAM and I/O inside the FPGA on the external Z80 bus:


Here an "Hello world" test to check the I/O implementation inside the FPGA. Before enabling the external EB/EBE drivers, the STM32 checks if the voltage from the external power supply (in this case on the Z80 APB board) is "good". Then it enables the logic inside the FPGA and let the Z80 run:


* TBD *



* * Z80 BLINKING LEDS (BLL) BOARD * *

The Z80 Blinking Leds (BLL) board allows "to see" the status of the bus with some leds. Probably it isn't the most useful board but... I like blinking leds so I just did it...

And here the result (in the photo the Z80 APB + the Z80 BLL + the Studio 68):

The power for the Z80 BLL board comes from the external EB/EBE bus, so it is drained from the power supply of the Z80 APB.


* * KR1801VM2 CPU APPLICATION BOARD * *

I've started testing a KR1801VM2 CPU (Soviet PDP11 "clone") with a custom "shield" for a custom development board I made previously (PicOne):

Here the the 4-layer PCB of the KR1801VM2 Application Board (APB). It should be possible to make with it something similar to a PDP11/03:


and here a first "hello world" test (KR1801VM2 APB + Studio 68):




* TBD *



* * KR1801VM2 BLINKING LEDS (BLL) BOARD * *

Certainly could not miss a board with blinking leds, so I did the KR1801VM2 Blinking Leds (BLL).

The Z80 KR1801VM2 Blinking Leds (BLL) board allows "to see" the status of the bus with some leds. Bot the 16 bit Address and data bus are "monitored", and also eight among the most important control signals:

The power for the KR1801VM2 BLL board comes from the external EB/EBE bus, so it is drained from the power supply of the KR1801VM2 APB.

Here the KR1801VM2 BLL + KR1801VM2 APB + Studio 68 in action:

* TBD *


* * VGA ADAPTER BOARD * * 

The VGA Adapter board allows to use a VGA video output and a PS/2 keyboard input to make a color video terminal (providing a suitable "core" inside the FPGA) using the "shared" GPIO connector (shared among the FPGA, the STM32 and the GPIO connector itself) of the Studio 68:



Here the output of a simple test made with the Arduino IDE using the STM32 as processor and a VHDL based on the Grant Searle's video terminal taken from here:




* TBD *