sprhawk-
Length Matching on DDR Data 0 bus
11/26/2023 at 15:36 • 0 commentsFinally I think I got my understanding to length calculation in net inspector and length matching tool, and I should rely on the result of length matching tool.
I need to do length matching to other groups -
Routed DDR lines
06/09/2023 at 04:54 • 0 commentsWill continue to do length matching as next step
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Change to 96boards SoM spec
05/14/2023 at 14:51 • 0 commentsI tried but mini PCIe spec is too small for it.
I have to add extended area to put PMIC So I decided to change the board spec to 96boards SoM instead.
I will have more area to put all components -
I changed my stack up
03/16/2023 at 14:32 • 0 commentsJLC Calculation New Stack up
Updated Net Classes
Updated Custom Rules
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Fan Out SoC pins and update Design Rules
03/16/2023 at 06:58 • 0 commentsFan out SoC pins ( by hand )
Updated Design Rules:
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Prepared to start PCB layout / routing
03/16/2023 at 03:33 • 0 commentsI have set up basic schematic for minimum system:
Including SoC, DDR, eMMC, USB (OTG), PMIC (RK809), Camera (MIPI interface), etc I have setup PCB Physical Stackup (JLC061011-2116):
and basic Design Rules for impedance controlled routing:
Now basic layout:
Finally I think I got my understanding to length calculation in net inspector and length matching tool, and I should rely on the result of length matching tool.
Updated Net Classes
Updated Custom Rules
and basic Design Rules for impedance controlled routing:
