The simplest 4-bit RISC CPU

I have a few spare PCBs for sale for 4-bit RISC CPU.
I can sale them. If interested, send me email or private message 
to Marsianin245.

Fully assembled 4-bit CPU and tested simple program on it.
For example this program code executes in a loop:
address   code (hex)    instruction
0              00        No-op
1                10        clear A
2               21        Add 1
3               21        Add 1
4               22       Add 2
5               81        Jump on 1
 

partially assembled and tested: 5v vcc supply, timer, instruction counter.
Timer is generating clock approximately 1 Hz.
Instruction counter increments on falling edge of clock pulses,
counts from 0 to 15.

Found small mistake in the schematics. Inadvertently used chip 74LS01 with open collector. Should have used Simple NAND gate 74LS00. To fix this one simple way is to replace it with 75LS00. But PCB is already done. And pinout of 74LS00 chip is different. So the simplest other fix - is to put small pullup resistors about 1 k,  between outputs of 74LS01  pins 13 and 10 and +5 v to pull pins up.

Just received PCB from PCBway. See photo 1. Ordering from PCBway was very easy, in just a few clicks.
1. Select PCB size and type, 2. Upload the Gerber file. 3. Select address and delivery.

The PCB was manufactured quickly and delivered in less than one week.
Quality of 2-layer PCB looks good to the eye inspection.
Next step - is to assemble the RISC cpu.


 

Schematics v1.2 and PCB 2nd revision

I realized that the flip-flop chip 74LS173 is obsolete and no longer available.
Replaced the obsolete 74LS173 with other TTL flip-flop 74LS175.
Added jumper and switch for manual step clock operation,
Added 5v voltage regulator and bypass capacitors.
The new schematics revision 1.2 

Simulated the 4-bit CPU logic in Logicsim simulator to verify the design. Logical model includes all chips, registers and EEPROM memory.
Simulated execution of short programs by the processor. For example, simulated this program

instruction (byte); upper 4 bits: opcode; lower 4 bits data/address

00  -  no-op:   nothing happens

10   -  clears A register;   A: 0

21   - Add 1 to A;               A: 1

24  - Add 4 to A;              A: 5

25  - Add 5 to A;              A: 10

21   - Add 1 to A;               A: 11

40  - Jump conditional to address 0, if flag carry is on;  false

26  - Add 6 to A:              A: 1 and Flag carry 

41   - Jump conditional to address 1, if lag carry is is on; true   Jump executed on address 1