Please check out the Github for all future updates:
https://github.com/lambdamikel/picoram6116
A follow-up to my 2114 SRAM Emulator.
This time I am targeting the 6116 SRAM chip - full 2 KBs and a serious CPU at full speed (i.e., Z80 @ 1.8 MHz etc.)
Features
- Raspberry Pico-based SRAM 6116 emulation, fully software-based
- SD card for storing and loading of full 2KB memory dumps
- comfortable UI with OLED display for file operations
- ASCII HEX / FAT32 format facilitates file exchange and creation, e.g., with a PC assembler
- 4 user-selectable memory banks (UI buttons)
- powered directly over the 6116 power lines
- external power supply supported
- some nice LEDs
- versatile (i.e., should work with other 6116-based computers)
The Microprofessor MPF-1B is the first victim - it's 2 KB user & system RAM (U8) from 0x1800 - 0x1FFF is replaced by PicoRAM 6116:
Video:
The Microprofessor MPF-IP (One Plus, 1P) is the second victim - it's 2 KB user & system RAM (U5) from 0xF800 - 0xFFFF is replaced by PicoRAM 6116:
Video:
Theory of Operation
Well, this was a piece of work, and I wouldn't have succeeded without my trusted HP 1662A Logic Analyzer (see below for some details).
The first challenge was a lack of GPIO pins on the Pico. This wasn't a problem with my previous PicoRAM version, the 2114 emulator - the 2114 only required 10 address lines, 4 data lines, and a single WE (Write Enable) line. The Busch 2090 Microtronic which was the target platform for the emulator didn't even utilize the OE (Output Enable) line. In contrast, the 6116 now demanded a whooping 8 bits of data IO, 11 bits for the address bus, plus OE and WE - 21 GPIOs of the max. 26 that the Pico offers.
And, some of these had to be used for I2C and SPI, given that I wanted to keep the OLED display and SD card module. In addition, one analog pin for reading the 5 buttons. Hence, another 7 GPIOs became unavailable. I was hence short of by exactly 2 GPIOs to realize my dream design!
As a solution, I decided to multiplex the address bus - using 2x 74LS373 transparent 8bit latches, I came up with a design that introduced two multiplexing lines SEL1 and SEL2 to read the address in two batches - A0 to A5 in the first batch, and A6 to A10 in the second batch. The two latches are basically just used for their tri-state / High-Z ability; I am not even using them as latches. The LE is constantly kept high / 5V, making them transparent, i.e., any change to their inputs is immediately mirrored to the outputs, if enabled (their OEs are connected to SEL1 and SEL2, respectively).
Using this design, I now even had one spare GPIO left! I still don't have any good idea what to do with it, so it's just left as an open pin on the final version of the PCB (the extra pin is not shown in the video yet). Maybe for sound output. It was already extremely useful for analyzing the Pico's timing, i.e., determining the exact execution time of a piece of firmware code in nanoseconds (-> HP Logic Analyzer).
Please note that, unlike my previous PicoRAM 2090 2114 SRAM emulator, I did not include any level shifters or resistors networks. This Hackaday article, and my practical experience with PicoRAM 2090 running for hours without damage without voltage level conversion, convinced me that the Pico / RP2040 really is 5V tolerant. So I am not expecting any issues from that.
After a number of iterations, the final PCB looks like this - I have to confess that I needed 4 iterations this time. The availability of very inexpensive PCB production services in the far east made me definitely a bit more careless and more daring in that regard compared to previous projects. Also, I didn't do a breadboard prototype this time... my 3rd iteration PCB (seen in the demo video above) still has a glitch that requires a bodge wire - I forgot to connect LE to VCC...
This is the final version:
The MPF-1B video shows Rev....
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Thanks Ken - ha, yeah, emulating the Pico with the 6116 would be an even bigger challenge I guess :rofl