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STEbus and PC104 bus 80188 CPU board

A master of two popular industrial buses

Keith

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Description

This board was designed when PC104 was gaining popularity.

Details

All this functionality was achieved by using surface mounting and placing the STEbus address and data buffers under the memory chips.

I don't have this board or ROM contents.

Files

J543 TARGET188EB manual issue D.pdf Adobe Portable Document Format - 350.90 kB - 05/07/2024 at 01:02		Preview

J543_TARGET188EB_German.pdf Adobe Portable Document Format - 379.18 kB - 05/07/2024 at 01:02		Preview

J543-TARGET188EB-French.pdf Adobe Portable Document Format - 184.82 kB - 05/07/2024 at 01:02		Preview

J543 TARGET188EB dimensions.pdf Adobe Portable Document Format - 37.60 kB - 05/07/2024 at 01:03		Preview

Project Logs

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Circuit diagram
Keith • 05/07/2024 at 01:59 • 0 comments

1a. Block diagram
1b. CPU and memory

2. Clock and glue logic

3. Serial I/O

4. Parallel I/O

5. Bus connections

6. Decoupling and spare gates

View project log

Discussions

warlockd wrote 03/12/2026 at 17:58

Been trying to find the SourceView debugger for this board. You have any luck?

Are you sure? yes | no

Keith wrote 03/13/2026 at 03:15

Alas no.

Are you sure? yes | no

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