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GrayPar18: 5+5+5+3

A project log for miniMAC - Not an Ethernet Transceiver

custom(izable) circuit for sending some megabytes over differential pairs.

yann-guidon-ygdesYann Guidon / YGDES 10/27/2025 at 02:190 Comments

Some new circuiting on CircuitJS...

The 15 data bits are "pretty shallow" on the receiver end, with only 2 XORs of latency.

However the 3 MSB must be mixed with a pretty sophisticated 6->3 LUT. XORs won't cut it.

A good LUT prevents "cancellations" of multi-bit events.

However the 6 cascades are pretty short and there is very little avalanche... Maybe 8+8+2 is more efficient ?

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