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Hammer in ASIC

A project log for miniMAC - Not an Ethernet Transceiver

custom(izable) circuit for sending some megabytes over differential pairs.

yann-guidon-ygdesYann Guidon / YGDES 03/04/2026 at 02:160 Comments

So I got a pair of tiles on the soon taping out iHP26 run by Tiny Tapeout.

The original idea was : one tile works as an encoder, another as a decoder. But then I found out that I can reconfigure the Hammer as encoder or decoder with a mere MUX, and I originally designed the whole error encoder and decoder (including GPEAC) to be much smaller than a tile. So both the whole encoder and decoder could fit but you never know.

That's all fine but there are 2 big issues : limitation of IO pins and getting something simple done at first. And the mode pin (RX/TX) reduces the pin budget to 23.

A first simpler version would just implement the Hammer circuit, which requires 18 bits in and 18 bits out, which exceeds the budget. So I have to multiplex. Take the circuit below and replicate it 9 times (except the control signals).

Then translating the VHDL code to Verilog should be a breeze.

For the mode selection, it's just a MUX:

I wonder why I hadn't spotted this simplification earlier.

Anyway, I didn't use this approach, as I decided to implement both encoder and decoder in order to create an onchip "loopback":

Check the doc at https://github.com/YannGuidon/miniMAC_tx/blob/main/docs/info.md

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