Close
0%
0%

Primality radius display

Given a positive integer N greater than 1, display the smallest non negative r such that n±r is prime

Similar projects worth following

We start with a 32-bit long integer we will denote by N. Explorations of Goldbach's conjecture (by Sylvain) and the twin prime conjecture (by Yann) lead us to find out an intricated dented wheel structure underlying the integers, where each wheel has a prime number of teeth. This is more abstractly defined as a "configuration" of a given integer, as the finite sequence of N modulo the first prime numbers. This polycyclic structure serves as a basis of a sieve to filter out the right potential primality radii of N, defined as non negative integers r such that N-r and N+r are simultaneously prime. In this framework those primes make a Goldbach decomposition of 2N=(N-r)+(N+r), and the twin prime conjecture boils down to saying that infinitely many integers admit 1 as a primality radius.

As a proof of concept, we restrict ourselves to the smallest primality radius of N, denoted by r0(N), which conjecturally (this is the content of Cramer's conjecture) and numerically is O((log N)^2) or so. 

That way we end up with an upper bound for r0(N) less than 1.000, which allows us to use 5 blocks of 3 seven-segment LED displays: the 4 first ones to display N and the last (but not the least!) to display r0(N).

DISCLAIMER: I'm a complete beginner in the electronic field, so for this first project, I invited my talented friend Yann GUIDON to work as both my mentor and collaborator.

As for the hardware, we chose a Smartfusion 2 cardboard to run the sieve and subsequent primality testing algorithm (as N is prime if and only if r0(N)=0). We construct a table of primes through the use of Eratosthenes' sieve (that we code in Javascript), before loading this table in memory while starting the device. Then we use an improved double binary GCD algorithm to sieve out the potential candidates as primality radius.

  • Architecture overview

    Yann Guidon / YGDES06/29/2025 at 19:34 0 comments

    So I'll describe here the first aspects that have been discussed with @Sylvain JULIEN.

    The intended system contains:

    • a decimal keyboard (a phone keypad ?)
    • a "computer"
    • a multi-digit display (probably multiplexed LED)

    The first and last are Arduino-level circuits that many should be able to handle, but Sylvain wants the "computer" to be an actual dedicated electronic circuit. This implies a FPGA, which in turn requires a VHDL description and a suitable FPGA board.

    There is one FPGA board that would fit the bill (already available, small, cheap, sufficiently convenient, and enough hardware resources) : The SmartFusion2 Creative Development Board (I have the MicroSemi version dating from before it was bought by Microchip)

    • M2S025 FPGA (27K LUT4 with carry chains, 31× 1K×18 SRAM blocks, several 18×18bit DSP blocks...)
    • 64M Bytes DDR2 SDRAM
    • integrated programmer
    • Arduino-style header pins

    The issue is to get the free license, since Libero might not work for this very reference.

    I have one but Sylvain is not able to use it.

    Synthesis licenses are a big problem and it pops up again with the other available/suitable board : the older Actel Fusion Advanced Development Kit. I have several that contain a venerable AFS1500 (datecoded 2008), 32b×1M StaticRAM, and many other awesome features, but require a Gold license and a FlashPro3 programming dongle... I have them but they are very niche devices and Sylvain might not be able to use them either.

View project log

Enjoy this project?

Share

Discussions

Similar Projects

Does this project spark your interest?

Become a member to follow this project and never miss any updates