Overview

This project documents the design and development of a compact 200W Brushless DC (BLDC) motor controller using the Texas Instruments DRV8301 gate driver and STMicroelectronics STM32F303 microcontroller. The controller implements Field-Oriented Control (FOC) for smooth torque delivery across the full speed range — targeting robotics, industrial automation, and electric mobility applications requiring precise motor management in a small form factor.

The DRV8301 integrates a dual-channel bootstrapped gate driver, overcurrent protection, and a dual SPI-configurable current sense amplifier — significantly reducing external component count compared to discrete gate driver implementations. The STM32F303's hardware floating-point unit and dedicated motor control timers make it well-suited for real-time FOC computation at 20kHz PWM frequency.

Design Goals

- Continuous output power: 200W
- Operating voltage: 12V – 48V DC bus
- Peak phase current: 20A
- PWM switching frequency: 20kHz
- Control loop: Field-Oriented Control (FOC)   with Space Vector Modulation (SVM)
- Protection: Overcurrent / Overvoltage /   Undervoltage / Overtemperature
- Communication: CAN + UART
- Form factor: 70mm × 55mm 4-layer PCB

Hardware Architecture

Power Stage

The three-phase inverter uses six N-channel MOSFETs arranged in a standard H-bridge topology. The DRV8301 drives all six gates with adjustable dead-time insertion (50ns – 400ns via SPI) to prevent shoot-through at high switching frequencies. Bootstrap capacitors are sized for 48V operation with a 10% duty cycle minimum gate charge requirement.

Gate resistors are individually tunable per high-side and low-side switches — allowing independent control of turn-on and turn-off slew rates to balance switching loss against EMI. A common-mode choke on the DC bus input reduces conducted emissions from the high-frequency switching node.

Current Sensing

Phase current is measured using two shunt resistors on the low-side of phases A and B, with phase C current reconstructed by Kirchhoff's current law. The DRV8301's internal current sense amplifiers (gain selectable: 10x / 20x / 40x / 80x via SPI) feed directly into the STM32F303's 12-bit ADC — eliminating the need for external instrumentation amplifiers and simplifying the analog front-end layout.

ADC sampling is synchronized to the PWM center point via the STM32 advanced timer trigger — ensuring current samples are taken at the point of minimum switching noise, which is critical for stable FOC operation at low speeds.

Microcontroller and Control Loop

The STM32F303's 72MHz Cortex-M4F core runs the complete FOC algorithm including Clarke/Park transforms, PI current controllers, inverse Park transform, and Space Vector Modulation — all in fixed-point arithmetic on the FPU within a 50µs interrupt service routine. The hardware encoder interface captures quadrature encoder signals up to 4MHz for rotor position feedback.

CAN communication (125kbps – 1Mbps) handles command input and status telemetry in multi-axis systems. A secondary UART interface supports configuration and real-time data logging during development.

PCB Design Considerations

Laying out a mixed-signal power electronics board at this power level requires careful attention to current loop geometry, thermal management, and analog signal isolation.

The 4-layer stackup separates high-current power planes from the sensitive analog and digital signal layers:

Layer 1: Signal (MCU, gate drive signals, SPI, CAN)
Layer 2: Ground plane (solid, uninterrupted)
Layer 3: Power plane (12V-48V, PWM bridge)
Layer 4: Signal (current sense, analog, encoder)

The high-current switching loop — DC bus capacitor, MOSFET drain, source, and shunt resistor — is kept as small as possible to minimize parasitic inductance. Stray inductance in this loop directly causes voltage spikes on the MOSFET drain at turn-off, which can exceed device ratings if the loop area is not minimized.

Gate drive traces are routed as matched-length differential pairs where possible, with gate resistors placed physically close to the MOSFET gate pin to prevent parasitic oscillation. The bootstrap capacitor is placed immediately adjacent to the BST and SW pins of the DRV8301 high-side bootstrap circuit.

Current sense shunt resistors are placed in a Kelvin connection configuration — separate force and sense traces connect to the resistor pads independently to eliminate resistance of the current-carrying copper from the measurement path.

Thermal vias below the DRV8301 exposed pad connect to a copper pour on Layer 2, which spreads heat to the bottom-side copper area. MOSFET thermal vias follow the same pattern. Board-level thermal resistance was simulated prior to layout to confirm junction temperatures remain within datasheet limits at 200W continuous operation.

For engineers designing similar high-power motor control boards, the PCB design process — including component placement strategy, power loop routing, and DFM review — is covered in detail at TJHXPCB PCB Design Services.

Firmware Architecture

The firmware is structured around three execution contexts:

100µs FOC interrupt (highest priority) Clarke transform → Park transform → PI current controllers → Inverse Park → SVM → PWM update. ADC results for phase currents and bus voltage are read at interrupt entry. Rotor electrical angle is computed from the encoder count and pole pair number.

1ms control task Speed PI controller runs at 1kHz, outputting a q-axis current reference to the FOC interrupt. Flux weakening is applied above base speed by reducing d-axis current reference based on measured bus voltage and back-EMF estimate.

10ms supervisory task Fault detection (overcurrent, overvoltage, undervoltage, overtemperature), CAN telemetry transmission, and configuration parameter management.

State machine handles transitions between IDLE, ALIGNMENT, RUNNING, FAULT, and CALIBRATION states. Encoder offset calibration runs at startup — a controlled alignment current is applied to lock the rotor to a known electrical angle, establishing the encoder-to-electrical-angle offset stored in flash.

For projects requiring integrated hardware-firmware co-development from schematic to production firmware, TJHXPCB Embedded Systems Development covers the full design cycle including STM32-based motor control applications.

Protection Features

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Overcurrent:    DRV8301 hardware OCP (cycle-by-cycle)                + software peak current limit via ADC
Overvoltage:    Bus voltage monitoring, PWM disable >52V
Undervoltage:   DRV8301 UVLO + software threshold
Overtemperature: NTC on power stage, 80°C warning /                  95°C shutdown
Gate fault:     DRV8301 nFAULT pin monitored by MCU EXTI

All faults latch the controller into FAULT state. Recovery requires explicit fault clear command via CAN or UART — preventing automatic restart after a fault event.

Test Results

Initial bench testing at 24V / 10A (240W peak) confirmed stable FOC operation across 0 – 4,000 RPM on a 14-pole 200KV outrunner. Current loop bandwidth measured at approximately 1.2kHz (-3dB) with the tuned PI gains. Speed regulation under step load changes from 10% to 80% rated torque showed less than 2% speed deviation with recovery within 50ms.

Thermal imaging at 200W continuous confirmed DRV8301 case temperature stabilizing at 67°C and MOSFET case temperature at 58°C at 25°C ambient — within design margins. EMI pre-scan showed fundamental switching harmonics at 20kHz and multiples, with levels consistent with CISPR 11 Class B limits above 150kHz after common-mode filter addition.

Bill of Materials (Key Components)

ComponentPartQty
Gate DriverTI DRV83011
MCUSTM32F303CBT61
Power MOSFETIPP110N20N3G (200V, 55A)6
Current Shunt1mΩ / 1W (4-terminal)2
DC Bus Cap100µF / 63V electrolytic2
Bootstrap Cap100nF / 100V X7R3
CAN TransceiverSN65HVD2301
NTC Thermistor10kΩ B39501

Lessons Learned

Layout first, schematic second — at power electronics densities, the physical constraints of the current loop geometry and thermal pad placement should drive component selection and schematic topology, not the other way around.

Simulate the bootstrap timing — DRV8301 minimum on-time requirements for bootstrap recharge become a real constraint at duty cycles above 90%. Verify bootstrap capacitor sizing against the switching frequency and MOSFET gate charge before committing to layout.

ADC synchronization is not optional for FOC — unsynchronized ADC sampling produces current measurement noise that directly destabilizes the current PI controllers. The STM32 advanced timer injection trigger feature exists for this exact reason — use it.